Lines Matching defs:mmcr0
86 * adjust the mmcr0.en[0-5] and mmcr0.inten[0-5] values obtained from the
94 sys->mmcr0 &= ~(0x1UL << pmc);
95 sys->mmcr0 &= ~(0x1UL << (pmc+12));
100 sys->mmcr0 |= PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN;
102 sys->mmcr0 &= ~(PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN);
105 sys->mmcr0 |= PA6T_MMCR0_PREN;
107 sys->mmcr0 &= ~PA6T_MMCR0_PREN;
110 * The performance counter event settings are given in the mmcr0 and
114 mmcr0_val = sys->mmcr0;
116 pr_debug("mmcr0_val inited to %016lx\n", sys->mmcr0);
132 u64 mmcr0 = mmcr0_val;
136 mmcr0 &= ~(0x3FUL);
137 mtspr(SPRN_PA6T_MMCR0, mmcr0);
142 pr_debug("setup on cpu %d, mmcr0 %016lx\n", smp_processor_id(),
155 u64 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
163 mtspr(SPRN_PA6T_MMCR0, mmcr0);
167 pr_debug("start on cpu %d, mmcr0 %llx\n", smp_processor_id(), mmcr0);
174 u64 mmcr0;
177 mmcr0 = mfspr(SPRN_PA6T_MMCR0);
178 mmcr0 |= PA6T_MMCR0_FCM0;
179 mtspr(SPRN_PA6T_MMCR0, mmcr0);
183 pr_debug("stop on cpu %d, mmcr0 %llx\n", smp_processor_id(), mmcr0);
194 u64 mmcr0;
197 mmcr0 = mfspr(SPRN_PA6T_MMCR0);
198 mtspr(SPRN_PA6T_MMCR0, mmcr0 | PA6T_MMCR0_HANDDIS);
207 if (mmcr0 & PA6T_MMCR0_SIARLOG)
216 /* Restore mmcr0 to a good known value since the PMI changes it */
217 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
218 mtspr(SPRN_PA6T_MMCR0, mmcr0);