Lines Matching refs:arch
68 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip,
69 vcpu->arch.shared->msr);
70 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link,
71 vcpu->arch.regs.ctr);
72 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
73 vcpu->arch.shared->srr1);
75 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
93 vcpu->arch.shadow_msr &= ~MSR_SPE;
103 vcpu->arch.shadow_msr |= MSR_SPE;
109 if (vcpu->arch.shared->msr & MSR_SPE) {
110 if (!(vcpu->arch.shadow_msr & MSR_SPE))
112 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
136 load_fp_state(&vcpu->arch.fp);
138 current->thread.fp_save_area = &vcpu->arch.fp;
162 vcpu->arch.shadow_msr &= ~MSR_FP;
163 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
178 load_vr_state(&vcpu->arch.vr);
180 current->thread.vr_save_area = &vcpu->arch.vr;
206 vcpu->arch.shadow_msr &= ~MSR_DE;
207 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
217 vcpu->arch.shared->msr |= MSR_DE;
219 vcpu->arch.shadow_msr |= MSR_DE;
220 vcpu->arch.shared->msr &= ~MSR_DE;
231 u32 old_msr = vcpu->arch.shared->msr;
237 vcpu->arch.shared->msr = new_msr;
249 set_bit(priority, &vcpu->arch.pending_exceptions);
255 vcpu->arch.queued_dear = dear_flags;
256 vcpu->arch.queued_esr = esr_flags;
263 vcpu->arch.queued_dear = dear_flags;
264 vcpu->arch.queued_esr = esr_flags;
275 vcpu->arch.queued_esr = esr_flags;
282 vcpu->arch.queued_dear = dear_flags;
283 vcpu->arch.queued_esr = esr_flags;
289 vcpu->arch.queued_esr = esr_flags;
312 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
317 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
333 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
334 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
344 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
354 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
365 vcpu->arch.csrr0 = srr0;
366 vcpu->arch.csrr1 = srr1;
372 vcpu->arch.dsrr0 = srr0;
373 vcpu->arch.dsrr1 = srr1;
381 vcpu->arch.mcsrr0 = srr0;
382 vcpu->arch.mcsrr1 = srr1;
392 ulong crit_raw = vcpu->arch.shared->critical;
397 ulong new_msr = vcpu->arch.shared->msr;
400 if (!(vcpu->arch.shared->msr & MSR_SF)) {
408 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
415 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
448 allowed = vcpu->arch.shared->msr & MSR_CE;
454 allowed = vcpu->arch.shared->msr & MSR_ME;
464 allowed = vcpu->arch.shared->msr & MSR_EE;
470 allowed = vcpu->arch.shared->msr & MSR_DE;
484 set_guest_srr(vcpu, vcpu->arch.regs.nip,
485 vcpu->arch.shared->msr);
488 set_guest_csrr(vcpu, vcpu->arch.regs.nip,
489 vcpu->arch.shared->msr);
492 set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
493 vcpu->arch.shared->msr);
496 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
497 vcpu->arch.shared->msr);
501 vcpu->arch.regs.nip = vcpu->arch.ivpr |
502 vcpu->arch.ivor[priority];
504 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
506 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
508 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
510 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
511 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
518 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
524 clear_bit(priority, &vcpu->arch.pending_exceptions);
533 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
535 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
537 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
553 u32 period = TCR_GET_WP(vcpu->arch.tcr);
584 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
587 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
594 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
596 del_timer(&vcpu->arch.wdt_timer);
597 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
602 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
607 new_tsr = tsr = vcpu->arch.tsr;
619 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
631 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
632 vcpu->arch.watchdog_enabled) {
650 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
655 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
663 unsigned long *pending = &vcpu->arch.pending_exceptions;
677 vcpu->arch.shared->int_pending = !!*pending;
693 if (vcpu->arch.shared->msr & MSR_WE) {
724 vcpu->arch.epr_needed = true;
737 if (!vcpu->arch.sane) {
772 debug = vcpu->arch.dbg_reg;
775 current->thread.debug = vcpu->arch.dbg_reg;
777 vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
820 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
824 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
839 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
840 u32 dbsr = vcpu->arch.dbsr;
853 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
854 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
858 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
866 * Clear guest dbsr (vcpu->arch.dbsr)
868 vcpu->arch.dbsr = 0;
869 run->debug.arch.status = 0;
870 run->debug.arch.address = vcpu->arch.regs.nip;
873 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
876 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
878 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
880 run->debug.arch.address = dbg_reg->dac1;
882 run->debug.arch.address = dbg_reg->dac2;
908 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
951 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
966 __func__, vcpu->arch.regs.nip);
1117 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1126 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1143 if (vcpu->arch.shared->msr & MSR_SPE)
1178 __func__, exit_nr, vcpu->arch.regs.nip);
1201 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1202 vcpu->arch.fault_esr);
1208 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1214 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1215 vcpu->arch.fault_esr);
1221 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1235 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1250 unsigned long eaddr = vcpu->arch.fault_dear;
1256 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1257 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1271 vcpu->arch.fault_dear,
1272 vcpu->arch.fault_esr);
1297 vcpu->arch.paddr_accessed = gpaddr;
1298 vcpu->arch.vaddr_accessed = eaddr;
1308 unsigned long eaddr = vcpu->arch.regs.nip;
1384 u32 old_tsr = vcpu->arch.tsr;
1386 vcpu->arch.tsr = new_tsr;
1388 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1397 spin_lock_init(&vcpu->arch.wdt_lock);
1398 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1410 del_timer_sync(&vcpu->arch.wdt_timer);
1419 regs->pc = vcpu->arch.regs.nip;
1421 regs->ctr = vcpu->arch.regs.ctr;
1422 regs->lr = vcpu->arch.regs.link;
1424 regs->msr = vcpu->arch.shared->msr;
1427 regs->pid = vcpu->arch.pid;
1450 vcpu->arch.regs.nip = regs->pc;
1452 vcpu->arch.regs.ctr = regs->ctr;
1453 vcpu->arch.regs.link = regs->lr;
1482 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1483 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1484 sregs->u.e.mcsr = vcpu->arch.mcsr;
1487 sregs->u.e.tsr = vcpu->arch.tsr;
1488 sregs->u.e.tcr = vcpu->arch.tcr;
1491 sregs->u.e.vrsave = vcpu->arch.vrsave;
1500 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1501 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1502 vcpu->arch.mcsr = sregs->u.e.mcsr;
1505 vcpu->arch.vrsave = sregs->u.e.vrsave;
1509 vcpu->arch.dec = sregs->u.e.dec;
1525 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1526 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1527 sregs->u.e.decar = vcpu->arch.decar;
1528 sregs->u.e.ivpr = vcpu->arch.ivpr;
1540 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1541 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1542 vcpu->arch.decar = sregs->u.e.decar;
1543 vcpu->arch.ivpr = sregs->u.e.ivpr;
1552 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1553 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1554 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1555 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1556 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1557 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1558 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1559 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1560 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1561 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1562 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1563 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1564 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1565 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1566 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1567 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1576 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1577 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1578 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1579 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1580 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1581 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1582 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1583 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1584 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1585 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1586 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1587 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1588 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1589 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1590 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1591 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1603 sregs->pvr = vcpu->arch.pvr;
1607 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1619 if (vcpu->arch.pvr != sregs->pvr)
1630 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1644 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1647 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1651 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1654 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1658 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1661 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1670 *val = get_reg_val(id, vcpu->arch.epcr);
1674 *val = get_reg_val(id, vcpu->arch.tcr);
1677 *val = get_reg_val(id, vcpu->arch.tsr);
1683 *val = get_reg_val(id, vcpu->arch.vrsave);
1686 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1700 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1703 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1707 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1710 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1714 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1717 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1752 vcpu->arch.vrsave = set_reg_val(id, *val);
1755 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1820 vcpu->arch.epcr = new_epcr;
1822 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1823 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1824 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1831 vcpu->arch.tcr = new_tcr;
1838 set_bits(tsr_bits, &vcpu->arch.tsr);
1846 clear_bits(tsr_bits, &vcpu->arch.tsr);
1860 if (vcpu->arch.tcr & TCR_ARE) {
1861 vcpu->arch.dec = vcpu->arch.decar;
1930 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1932 vcpu->arch.shadow_msrp |= MSRP_DEP;
1934 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1937 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1939 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1941 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1953 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1954 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1956 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
2007 vcpu->arch.dbg_reg.dbcr0 = 0;
2015 vcpu->arch.dbg_reg.dbcr0 = 0;
2018 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2021 dbg_reg = &(vcpu->arch.dbg_reg);
2046 uint64_t addr = dbg->arch.bp[n].addr;
2047 uint32_t type = dbg->arch.bp[n].type;
2092 return kvm->arch.kvm_ops->init_vm(kvm);
2100 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2105 vcpu->arch.regs.nip = 0;
2106 vcpu->arch.shared->pir = vcpu->vcpu_id;
2111 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2112 vcpu->arch.shadow_pid = 1;
2113 vcpu->arch.shared->msr = 0;
2118 vcpu->arch.ivpr = 0x55550000;
2120 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2126 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2133 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2138 kvm->arch.kvm_ops->destroy_vm(kvm);
2143 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2148 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);