Lines Matching defs:cppr
16 u8 cppr;
38 cppr = ack & 0xff;
39 if (cppr < 8)
40 xc->pending |= 1 << cppr;
44 if (cppr >= xc->hw_cppr)
46 smp_processor_id(), cppr, xc->hw_cppr);
51 * xc->cppr, this will be done as we scan for interrupts
54 xc->hw_cppr = cppr;
133 /* Don't scan past the guest cppr */
134 if (prio >= xc->cppr || prio > 7) {
135 if (xc->mfrr < xc->cppr) {
219 if (prio >= xc->mfrr && xc->mfrr < xc->cppr) {
251 * Note: This can only make xc->cppr smaller as the previous
253 * the current xc->cppr. Thus we don't need to re-check xc->mfrr
257 xc->cppr = prio;
264 if (xc->cppr != xc->hw_cppr) {
265 xc->hw_cppr = xc->cppr;
266 __x_writeb(xc->cppr, __x_tima + TM_QW1_OS + TM_CPPR);
285 pr_devel(" new pending=0x%02x hw_cppr=%d cppr=%d\n",
286 xc->pending, xc->hw_cppr, xc->cppr);
289 old_cppr = xive_prio_to_guest(xc->cppr);
294 pr_devel(" got hirq=0x%x hw_cppr=%d cppr=%d\n",
295 hirq, xc->hw_cppr, xc->cppr);
353 vcpu->arch.regs.gpr[4] = hirq | (xc->cppr << 24);
382 for (prio = xc->cppr; prio < KVMPPC_XIVE_Q_COUNT; prio++) {
442 X_STATIC int GLUE(X_PFX,h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr)
448 pr_devel("H_CPPR(cppr=%ld)\n", cppr);
453 cppr = xive_prio_from_guest(cppr);
456 old_cppr = xc->cppr;
457 xc->cppr = cppr;
460 * Order the above update of xc->cppr with the subsequent
465 if (cppr > old_cppr) {
495 xc->hw_cppr = cppr;
496 __x_writeb(cppr, __x_tima + TM_QW1_OS + TM_CPPR);
517 xc->cppr = xive_prio_from_guest(new_cppr);
527 * This barrier orders the setting of xc->cppr vs.
552 * of xc->cppr vs. subsquent test of xc->mfrr done inside
600 xc->hw_cppr = xc->cppr;
601 __x_writeb(xc->cppr, __x_tima + TM_QW1_OS + TM_CPPR);
625 * The load of xc->cppr below and the subsequent MMIO store
630 * updating xc->cppr then reading xc->mfrr.
636 /* Shoot the IPI if most favored than target cppr */
637 if (mfrr < xc->cppr)