Lines Matching refs:shregs
43 hr->srr0 = vcpu->arch.shregs.srr0;
44 hr->srr1 = vcpu->arch.shregs.srr1;
45 hr->sprg[0] = vcpu->arch.shregs.sprg0;
46 hr->sprg[1] = vcpu->arch.shregs.sprg1;
47 hr->sprg[2] = vcpu->arch.shregs.sprg2;
48 hr->sprg[3] = vcpu->arch.shregs.sprg3;
108 hr->srr0 = vcpu->arch.shregs.srr0;
109 hr->srr1 = vcpu->arch.shregs.srr1;
110 hr->sprg[0] = vcpu->arch.shregs.sprg0;
111 hr->sprg[1] = vcpu->arch.shregs.sprg1;
112 hr->sprg[2] = vcpu->arch.shregs.sprg2;
113 hr->sprg[3] = vcpu->arch.shregs.sprg3;
162 vcpu->arch.shregs.srr0 = hr->srr0;
163 vcpu->arch.shregs.srr1 = hr->srr1;
164 vcpu->arch.shregs.sprg0 = hr->sprg[0];
165 vcpu->arch.shregs.sprg1 = hr->sprg[1];
166 vcpu->arch.shregs.sprg2 = hr->sprg[2];
167 vcpu->arch.shregs.sprg3 = hr->sprg[3];
188 vcpu->arch.shregs.srr0 = hr->srr0;
189 vcpu->arch.shregs.srr1 = hr->srr1;
190 vcpu->arch.shregs.sprg0 = hr->sprg[0];
191 vcpu->arch.shregs.sprg1 = hr->sprg[1];
192 vcpu->arch.shregs.sprg2 = hr->sprg[2];
193 vcpu->arch.shregs.sprg3 = hr->sprg[3];
235 if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr))
267 if (MSR_TM_SUSPENDED(vcpu->arch.shregs.msr)) {
273 if (WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_TS_MASK))
288 vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
300 vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
320 l2_regs.msr = vcpu->arch.shregs.msr;
330 vcpu->arch.shregs.msr = saved_l1_regs.msr & ~MSR_TS_MASK;
333 vcpu->arch.shregs.msr |= MSR_TS_S;
1230 vcpu->arch.shregs.msr &= SRR1_MSR_BITS;
1231 vcpu->arch.shregs.msr |= flags;