Lines Matching defs:sli_ctl_portx
1158 union cvmx_sli_ctl_portx sli_ctl_portx;
1398 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port));
1399 sli_ctl_portx.s.ptlp_ro = 1;
1400 sli_ctl_portx.s.ctlp_ro = 1;
1401 sli_ctl_portx.s.wait_com = 0;
1402 sli_ctl_portx.s.waitl_com = 0;
1403 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port), sli_ctl_portx.u64);
1865 union cvmx_sli_ctl_portx sli_ctl_portx;
2068 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(port));
2069 sli_ctl_portx.s.inta_map = 1;
2070 sli_ctl_portx.s.intb_map = 1;
2071 sli_ctl_portx.s.intc_map = 1;
2072 sli_ctl_portx.s.intd_map = 1;
2073 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(port), sli_ctl_portx.u64);
2075 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(!port));
2076 sli_ctl_portx.s.inta_map = 0;
2077 sli_ctl_portx.s.intb_map = 0;
2078 sli_ctl_portx.s.intc_map = 0;
2079 sli_ctl_portx.s.intd_map = 0;
2080 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(!port), sli_ctl_portx.u64);