msi-xlp.c - OpenGrok cross reference for /kernel/linux/linux-5.10/arch/mips/pci/msi-xlp.c

Lines Matching refs:md
134 	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);
139 	spin_lock_irqsave(&md->msi_lock, flags);
140 	md->msi_enabled_mask |= 1u << vec;
142 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_EN,
143 				md->msi_enabled_mask);
145 		nlm_write_reg(md->lnkbase, PCIE_MSI_EN, md->msi_enabled_mask);
146 	spin_unlock_irqrestore(&md->msi_lock, flags);
151 	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);
156 	spin_lock_irqsave(&md->msi_lock, flags);
157 	md->msi_enabled_mask &= ~(1u << vec);
159 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_EN,
160 				md->msi_enabled_mask);
162 		nlm_write_reg(md->lnkbase, PCIE_MSI_EN, md->msi_enabled_mask);
163 	spin_unlock_irqrestore(&md->msi_lock, flags);
168 	struct xlp_msi_data *md = irq_data_get_irq_chip_data(d);
177 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_STATUS, 1u << vec);
179 		nlm_write_reg(md->lnkbase, PCIE_MSI_STATUS, 1u << vec);
207 	struct xlp_msi_data *md;
214 	md = irq_data_get_irq_chip_data(d);
224 	nlm_write_reg(md->lnkbase, status_reg, 1u << bit);
227 		nlm_pic_ack(md->node->picbase,
296 	struct xlp_msi_data *md;
305 	md = irq_get_chip_data(xirq);
308 	spin_lock_irqsave(&md->msi_lock, flags);
309 	if (md->msi_alloc_mask == 0) {
322 	msivec = fls(md->msi_alloc_mask);
324 		spin_unlock_irqrestore(&md->msi_lock, flags);
327 	md->msi_alloc_mask |= (1u << msivec);
328 	spin_unlock_irqrestore(&md->msi_lock, flags);
403 	struct xlp_msi_data *md;
412 	md = irq_get_chip_data(xirq);
415 	spin_lock_irqsave(&md->msi_lock, flags);
417 	if (md->msix_alloc_mask == 0)
421 	t = fls(md->msix_alloc_mask);
423 		spin_unlock_irqrestore(&md->msi_lock, flags);
426 	md->msix_alloc_mask |= (1u << t);
427 	spin_unlock_irqrestore(&md->msi_lock, flags);
469 	struct xlp_msi_data *md;
476 	md = kzalloc(sizeof(*md), GFP_KERNEL);
477 	spin_lock_init(&md->msi_lock);
478 	md->msi_enabled_mask = 0;
479 	md->msi_alloc_mask = 0;
480 	md->msix_alloc_mask = 0;
481 	md->node = nodep;
482 	md->lnkbase = nlm_get_pcie_base(node, link);
488 		irq_set_chip_data(i, md);
495 			nlm_write_pcie_reg(md->lnkbase, PCIE_9XX_MSIX_VECX(i +
511 		irq_set_chip_data(irq, md);
517 	struct xlp_msi_data *md;
523 	md = irq_get_chip_data(irqbase);
525 		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSI_STATUS) &
526 						md->msi_enabled_mask;
528 		status = nlm_read_reg(md->lnkbase, PCIE_MSI_STATUS) &
529 						md->msi_enabled_mask;
539 		nlm_pic_ack(md->node->picbase,
542 		nlm_pic_ack(md->node->picbase, PIC_IRT_PCIE_LINK_INDEX(link));
547 	struct xlp_msi_data *md;
553 	md = irq_get_chip_data(irqbase);
555 		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSIX_STATUSX(link));
557 		status = nlm_read_reg(md->lnkbase, PCIE_MSIX_STATUS);