Lines Matching defs:reg
41 } reg;
56 reg.reset_counter1 = 0;
57 reg.reset_counter2 = 0;
65 reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
70 reg.reset_counter2 = 0x80000000ULL - cfg[1].count;
81 reg.ctrl = ctrl;
83 reg.cnt1_enabled = cfg[0].enabled;
84 reg.cnt2_enabled = cfg[1].enabled;
89 write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
95 if (reg.cnt1_enabled || reg.cnt2_enabled)
96 write_c0_perfctrl(reg.ctrl);
103 memset(®, 0, sizeof(reg));
116 enabled = reg.cnt1_enabled | reg.cnt2_enabled;
125 if (reg.cnt1_enabled)
127 counter1 = reg.reset_counter1;
130 if (reg.cnt2_enabled)
132 counter2 = reg.reset_counter2;