Lines Matching defs:inst

22 #include <asm/inst.h>
570 * @inst: 32-bit instruction encoding.
572 * Finds whether @inst encodes an EVA memory access instruction, which would
577 * Returns: Whether @inst encodes an EVA accessor instruction.
579 static bool is_eva_access(union mips_instruction inst)
581 if (inst.spec3_format.opcode != spec3_op)
584 switch (inst.spec3_format.func) {
651 union mips_instruction inst;
670 err = kvm_get_badinstr(opc, vcpu, &inst.word);
671 if (!err && is_eva_access(inst))
825 u32 inst = 0;
832 kvm_get_badinstr(opc, vcpu, &inst);
834 kvm_err("Exception Code: %d not handled @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#x\n",
835 exccode, opc, inst, badvaddr,
877 static enum emulation_result kvm_vz_gpsi_cop0(union mips_instruction inst,
896 if (inst.co_format.co) {
897 switch (inst.co_format.func) {
905 rt = inst.c0r_format.rt;
906 rd = inst.c0r_format.rd;
907 sel = inst.c0r_format.sel;
909 switch (inst.c0r_format.rs) {
966 if (inst.c0r_format.rs == mfc_op)
971 trace_kvm_hwr(vcpu, (inst.c0r_format.rs == mfc_op) ?
982 trace_kvm_hwr(vcpu, (inst.c0r_format.rs == mtc_op) ?
1008 val = mips_process_maar(inst.c0r_format.rs,
1068 curr_pc, __func__, inst.word);
1076 static enum emulation_result kvm_vz_gpsi_cache(union mips_instruction inst,
1095 base = inst.i_format.rs;
1096 op_inst = inst.i_format.rt;
1098 offset = inst.spec3_format.simmediate;
1100 offset = inst.i_format.simmediate;
1145 static enum emulation_result kvm_vz_gpsi_lwc2(union mips_instruction inst,
1163 rs = inst.loongson3_lscsr_format.rs;
1164 rd = inst.loongson3_lscsr_format.rd;
1165 switch (inst.loongson3_lscsr_format.fr) {
1197 inst.loongson3_lscsr_format.fr, vcpu->arch.gprs[rs], curr_pc);
1205 curr_pc, __func__, inst.word, inst.loongson3_lscsr_format.fr);
1219 union mips_instruction inst;
1228 err = kvm_get_badinstr(opc, vcpu, &inst.word);
1232 switch (inst.r_format.opcode) {
1234 er = kvm_vz_gpsi_cop0(inst, opc, cause, vcpu);
1239 er = kvm_vz_gpsi_cache(inst, opc, cause, vcpu);
1244 er = kvm_vz_gpsi_lwc2(inst, opc, cause, vcpu);
1248 switch (inst.spec3_format.func) {
1252 er = kvm_vz_gpsi_cache(inst, opc, cause, vcpu);
1256 if (inst.r_format.rs || (inst.r_format.re >> 3))
1259 rd = inst.r_format.rd;
1260 rt = inst.r_format.rt;
1261 sel = inst.r_format.re & 0x7;
1287 opc, inst.word);
1301 union mips_instruction inst;
1309 err = kvm_get_badinstr(opc, vcpu, &inst.word);
1314 if (inst.c0r_format.opcode == cop0_op &&
1315 inst.c0r_format.rs == mtc_op &&
1316 inst.c0r_format.z == 0) {
1317 int rt = inst.c0r_format.rt;
1318 int rd = inst.c0r_format.rd;
1319 int sel = inst.c0r_format.sel;
1407 opc, inst.word);
1415 opc, inst.word);
1438 union mips_instruction inst;
1444 err = kvm_get_badinstr(opc, vcpu, &inst.word);
1457 er = kvm_mips_emul_hypcall(vcpu, inst);
1469 u32 inst;
1476 kvm_get_badinstr(opc, vcpu, &inst);
1478 kvm_err("Guest Exception Code: %d not yet handled @ PC: %p, inst: 0x%08x Status: %#x\n",
1479 gexccode, opc, inst, read_gc0_status());
1625 union mips_instruction inst;
1639 err = kvm_get_badinstr(opc, vcpu, &inst.word);
1646 er = kvm_mips_emulate_load(inst, cause, vcpu);
1672 union mips_instruction inst;
1686 err = kvm_get_badinstr(opc, vcpu, &inst.word);
1693 er = kvm_mips_emulate_store(inst, cause, vcpu);