Lines Matching refs:r4030_write_reg32
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
85 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
153 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
309 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
317 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
348 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
379 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
388 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
409 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
416 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
440 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
454 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);