Lines Matching refs:base
275 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR);
276 __raw_writel(0, base + 0x110); /* the write op is key */
286 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
288 unsigned long d = __raw_readl(base + AU1000_GPIO2_DIR);
294 __raw_writel(d, base + AU1000_GPIO2_DIR);
300 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
303 __raw_writel(mask, base + AU1000_GPIO2_OUTPUT);
309 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
310 return __raw_readl(base + AU1000_GPIO2_PINSTATE) &
361 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
362 unsigned long r = __raw_readl(base + AU1000_GPIO2_INTENABLE);
367 __raw_writel(r, base + AU1000_GPIO2_INTENABLE);
443 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
444 __raw_writel(3, base + AU1000_GPIO2_ENABLE); /* reset, clock enabled */
446 __raw_writel(1, base + AU1000_GPIO2_ENABLE); /* clock enabled */
457 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1500_GPIO2_PHYS_ADDR);
458 __raw_writel(2, base + AU1000_GPIO2_ENABLE); /* reset, clock disabled */