Lines Matching defs:base
228 static int dwc3_octeon_config_power(struct device *dev, u64 base)
236 int index = (base >> 24) & 1;
271 uctl_host_cfg.u64 = cvmx_read_csr(base + UCTL_HOST_CFG);
274 cvmx_write_csr(base + UCTL_HOST_CFG, uctl_host_cfg.u64);
277 uctl_host_cfg.u64 = cvmx_read_csr(base + UCTL_HOST_CFG);
280 cvmx_write_csr(base + UCTL_HOST_CFG, uctl_host_cfg.u64);
286 static int dwc3_octeon_clocks_start(struct device *dev, u64 base)
295 u64 uctl_ctl_reg = base;
441 if (dwc3_octeon_config_power(dev, base)) {
467 static void __init dwc3_octeon_set_endian_mode(u64 base)
472 shim_cfg.u64 = cvmx_read_csr(base + UCTL_SHIM_CFG);
480 cvmx_write_csr(base + UCTL_SHIM_CFG, shim_cfg.u64);
486 static void __init dwc3_octeon_phy_reset(u64 base)
489 int index = (base >> 24) & 1;
502 void __iomem *base;
532 base = devm_ioremap_resource(&pdev->dev, res);
533 if (IS_ERR(base)) {
535 return PTR_ERR(base);
539 dwc3_octeon_clocks_start(&pdev->dev, (u64)base);
540 dwc3_octeon_set_endian_mode((u64)base);
541 dwc3_octeon_phy_reset((u64)base);
544 devm_iounmap(&pdev->dev, base);