Lines Matching defs:stat
433 union cvmx_spxx_clk_stat stat;
449 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));
450 if (stat.s.s4clk0 && stat.s.s4clk1 && clock_transitions) {
456 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
457 stat.s.s4clk0 = 0;
458 stat.s.s4clk1 = 0;
464 } while (stat.s.s4clk0 == 0 || stat.s.s4clk1 == 0);
474 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));
475 if (stat.s.d4clk0 && stat.s.d4clk1 && clock_transitions) {
481 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
482 stat.s.d4clk0 = 0;
483 stat.s.d4clk1 = 0;
489 } while (stat.s.d4clk0 == 0 || stat.s.d4clk1 == 0);
511 union cvmx_spxx_clk_stat stat;
548 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));
549 if (stat.s.srxtrn && rx_training_needed) {
551 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);
552 stat.s.srxtrn = 0;
558 } while (stat.s.srxtrn == 0);
596 union cvmx_spxx_clk_stat stat;
609 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));
614 } while (stat.s.stxcal == 0);