Lines Matching refs:nint
212 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,
219 t *= nint;
238 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;
258 nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
270 nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
277 cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,
285 nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
297 nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
304 ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,
356 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
373 nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) &
378 cpu_pll = nint * ref_rate / ref_div;
387 nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) &
392 ddr_pll = nint * ref_rate / ref_div;
439 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
456 nint = (pll >> QCA955X_PLL_CPU_CONFIG_NINT_SHIFT) &
461 cpu_pll = nint * ref_rate / ref_div;
470 nint = (pll >> QCA955X_PLL_DDR_CONFIG_NINT_SHIFT) &
475 ddr_pll = nint * ref_rate / ref_div;
522 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv;
551 nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) &
558 cpu_pll = nint * ref_rate / ref_div;
569 nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) &
576 ddr_pll = nint * ref_rate / ref_div;