Lines Matching refs:bootcr
160 u32 *bootcr, u32 bus_clock)
171 switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
186 if (*bootcr & BOOT_PLL_BYPASS)
206 u32 *bootcr, u32 frequency)
211 switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
239 u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4);
245 &clocks->bus, bootcr, AR7_AFE_CLOCK);
247 if (*bootcr & BOOT_PLL_ASYNC_MODE)
249 &clocks->cpu, bootcr, AR7_AFE_CLOCK);
255 bootcr, dsp_clk.rate);
258 iounmap(bootcr);
295 static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
297 if (*bootcr & BOOT_PLL_ASYNC_MODE)
307 if (*bootcr & BOOT_PLL_2TO1_MODE)
323 u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4);
331 cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr);
332 dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr);
334 if (*bootcr & BOOT_PLL_ASYNC_MODE) {
356 if (*bootcr & BOOT_PLL_2TO1_MODE) {
401 iounmap(bootcr);