clock.c - OpenGrok cross reference for /kernel/linux/linux-5.10/arch/mips/ar7/clock.c

Lines Matching defs:clock
159 static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
164 	u32 ctrl = readl(&clock->ctrl);
165 	u32 pll = readl(&clock->pll);
205 static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
228 	writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
230 	writel(4, &clock->pll);
231 	while (readl(&clock->pll) & PLL_STATUS)
233 	writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
261 static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
269 	writel(0, &clock->ctrl);
270 	writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
271 	writel((mul - 1) & 0xF, &clock->mul);
273 	while (readl(&clock->status) & 0x1)
276 	writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
278 	writel(readl(&clock->cmden) | 1, &clock->cmden);
279 	writel(readl(&clock->cmd) | 1, &clock->cmd);
281 	while (readl(&clock->status) & 0x1)
284 	writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);
286 	writel(readl(&clock->cmden) | 1, &clock->cmden);
287 	writel(readl(&clock->cmd) | 1, &clock->cmd);
289 	while (readl(&clock->status) & 0x1)
292 	writel(readl(&clock->ctrl) | 1, &clock->ctrl);
337 		printk(KERN_INFO "Clocks: Setting DSP clock\n");
346 		printk(KERN_INFO "Clocks: Setting CPU clock\n");
359 			printk(KERN_INFO "Clocks: Setting CPU clock\n");
368 			printk(KERN_INFO "Clocks: Setting DSP clock\n");
378 			printk(KERN_INFO "Clocks: Setting DSP clock\n");
390 	printk(KERN_INFO "Clocks: Setting USB clock\n");
405  * Linux clock API
463 	/* adjust vbus clock rate */