Lines Matching defs:zero
438 set z_bit, 0x2 # zero result
449 set dz_bit, 2 # divide by zero
464 set z_mask, 0x04000000 # zero bit mask (lw)
469 set z_bmask, 0x04 # zero bit mask (byte)
484 set adz_mask, 0x00000010 # accrued divide by zero
524 set rz_mode, 0x1 # round-to-zero
703 andi.l &0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
705 fmov.l &0x0,%fpcr # zero current control regs
789 and.l &0xffff00ff,USER_FPSR(%a6) # zero all but accured field
791 fmov.l &0x0,%fpcr # zero current control regs
948 fmov.l &0x0,%fpcr # zero current control regs
1063 and.l &0xffff00ff,USER_FPSR(%a6) # zero all but accured field
1065 fmov.l &0x0,%fpcr # zero current control regs
1220 # if the exception is an opclass zero or two unimplemented data type
1254 # so, since the emulation routines re-create them anyways, zero exception field
1255 andi.l &0x00ff00ff,USER_FPSR(%a6) # zero exception field
1257 fmov.l &0x0,%fpcr # zero current control regs
1450 beq.b fso_zero # it's a skewed zero
1481 tst.l LOCAL_LO(%a0) # is it a zero?
1508 # so, since the emulation routines re-create them anyways, zero exception field.
1510 and.l &0xffff00ff,USER_FPSR(%a6) # zero exception field
1512 fmov.l &0x0,%fpcr # zero current control regs
1810 # so, since the emulation routines re-create them anyways, zero exception field
1811 andi.l &0x0ff00ff,USER_FPSR(%a6) # zero exception field
1813 fmov.l &0x0,%fpcr # zero current control regs
2067 # so, since the emulation routines re-create them anyways, zero exception field.
2069 and.l &0xffff00ff,USER_FPSR(%a6) # zero exception field
2071 fmov.l &0x0,%fpcr # zero current control regs
2534 # The packed operand is a zero if the mantissa is all zero, else it's
2538 bne.b iea_op_gp_not_spec # not a zero
2539 tst.l FP_SRC_HI(%a6) # is lw 2 zero?
2540 bne.b iea_op_gp_not_spec # not a zero
2541 tst.l FP_SRC_LO(%a6) # is lw 3 zero?
3091 # for opclass zero and two instruction taking this exception, the #
3281 # for opclass zero and two instructions taking this exception, the #
3582 # for opclass zero and two instruction taking this exception, the #
3635 # Here, we zero the ccode and exception byte field since we're going to
3640 andi.l &0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
3642 fmov.l &0x0,%fpcr # zero current control regs
3730 andi.l &0xffff00ff,USER_FPSR(%a6) # zero exception field
3791 # this would be the case for opclass two operations with a source zero
3837 # non-zero <ea> field. These may get flagged as "Line F" but should #
3857 # if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if
3878 # it's an fmovecr w/ a non-zero <ea> that has entered through
4478 short tbl_trans - tbl_trans # $01-1 fint zero
4487 short src_zero - tbl_trans # $02-1 fsinh zero
4496 short tbl_trans - tbl_trans # $03-1 fintrz zero
4505 short tbl_trans - tbl_trans # $04-1 fsqrt zero
4523 short src_zero - tbl_trans # $06-1 flognp1 zero
4541 short src_zero - tbl_trans # $08-1 fetoxm1 zero
4550 short src_zero - tbl_trans # $09-1 ftanh zero
4559 short src_zero - tbl_trans # $0a-1 fatan zero
4577 short src_zero - tbl_trans # $0c-1 fasin zero
4586 short src_zero - tbl_trans # $0d-1 fatanh zero
4595 short src_zero - tbl_trans # $0e-1 fsin zero
4604 short src_zero - tbl_trans # $0f-1 ftan zero
4613 short ld_pone - tbl_trans # $10-1 fetox zero
4622 short ld_pone - tbl_trans # $11-1 ftwotox zero
4631 short ld_pone - tbl_trans # $12-1 ftentox zero
4649 short t_dz2 - tbl_trans # $14-1 flogn zero
4658 short t_dz2 - tbl_trans # $15-1 flog10 zero
4667 short t_dz2 - tbl_trans # $16-1 flog2 zero
4685 short tbl_trans - tbl_trans # $18-1 fabs zero
4694 short ld_pone - tbl_trans # $19-1 fcosh zero
4703 short tbl_trans - tbl_trans # $1a-1 fneg zero
4721 short ld_ppi2 - tbl_trans # $1c-1 facos zero
4730 short ld_pone - tbl_trans # $1d-1 fcos zero
4739 short src_zero - tbl_trans # $1e-1 fgetexp zero
4748 short src_zero - tbl_trans # $1f-1 fgetman zero
4757 short tbl_trans - tbl_trans # $20-1 fdiv zero
4766 short smod_szero - tbl_trans # $21-1 fmod zero
4775 short tbl_trans - tbl_trans # $22-1 fadd zero
4784 short tbl_trans - tbl_trans # $23-1 fmul zero
4793 short tbl_trans - tbl_trans # $24-1 fsgldiv zero
4802 short srem_szero - tbl_trans # $25-1 frem zero
4811 short sscale_szero - tbl_trans # $26-1 fscale zero
4820 short tbl_trans - tbl_trans # $27-1 fsglmul zero
4829 short tbl_trans - tbl_trans # $28-1 fsub zero
4901 short ssincosz - tbl_trans # $30-1 fsincos zero
4910 short ssincosz - tbl_trans # $31-1 fsincos zero
4919 short ssincosz - tbl_trans # $32-1 fsincos zero
4928 short ssincosz - tbl_trans # $33-1 fsincos zero
4937 short ssincosz - tbl_trans # $34-1 fsincos zero
4946 short ssincosz - tbl_trans # $35-1 fsincos zero
4955 short ssincosz - tbl_trans # $36-1 fsincos zero
4964 short ssincosz - tbl_trans # $37-1 fsincos zero
6778 bra ld_pzero # answer is positive zero
6912 # zero. The reason for such a special form is that T-1, #
6941 # Notes: For non-zero X, the inexact exception will always be #
7040 # zero. The reason for such a special form is that T-1, #
7208 #--entry point for EXP(X), here X is finite, non-zero, and not NaN's
7371 #--entry point for EXPM1(X), here X is finite, non-zero, non-NaN
8134 zero:
8638 fmov.s zero(%pc),%fp1 # FP1 IS K = 0
8652 fmov.s zero(%pc),%fp0
8695 # divide-by-zero by #
8847 fbeq.l ld_pzero # return an EXACT zero
9339 tst.b %d1 # if zero, offset is to pi
9342 ble.b z_val # if in this range, return zero
9346 ble.b z_val # if in this range, return zero
9351 bra.l ld_pzero # return a zero
9639 clr.l -(%sp) # insert zero low mantissa
9641 clr.l -(%sp) # make zero exponent
9647 clr.l -(%sp) # insert zero high mantissa
9648 clr.l -(%sp) # make zero exponent
10229 # In such a case, the EXOP equals zero. #
10479 # src_zero(): Return signed zero according to sign of src operand. #
10484 bmi.b ld_mzero # if neg, load neg zero
10487 # ld_pzero(): return a positive zero.
10495 # ld_mzero(): return a negative zero.
10503 # dst_zero(): Return signed zero according to sign of dst operand. #
10508 bmi.b ld_mzero # if neg, load neg zero
10509 bra.b ld_pzero # load positive zero
11528 # scale_to_zero_src() - scale src exponent to zero #
11529 # scale_to_zero_dst() - scale dst exponent to zero #
11776 # for fun, let's use only extended precision, round to zero. then, let
12025 # scale_to_zero_src() - scale src exponent to zero #
12330 # prec:mode should be zero at this point but it won't affect answer anyways.
12345 # scale_to_zero_src() - scale src exponent to zero #
12346 # scale_to_zero_dst() - scale dst exponent to zero #
13110 # prec:mode should be zero at this point but it won't affect answer anyways.
13222 # norms. Denorms are so low that the answer will either be a zero or a #
13275 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
13328 # norms. Denorms are so low that the answer will either be a zero or a #
13377 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
13438 # scale the operand such that the exponent is zero. Perform an "fabs" #
13930 # scale_to_zero_src() - scale src exponent to zero #
13931 # scale_to_zero_dst() - scale dst exponent to zero #
14271 # scale_to_zero_src() - scale src exponent to zero #
14272 # scale_to_zero_dst() - scale dst exponent to zero #
14614 # scale_to_zero_src() - set src operand exponent equal to zero #
14615 # scale_to_zero_dst() - set dst operand exponent equal to zero #
14676 fbeq.w fadd_zero_exit # if result is zero, end now
14708 # fmov.s &0x00000000,%fp0 # return zero in fp0
14861 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
14967 # and return the appropriately signed zero.
15067 # scale_to_zero_src() - set src operand exponent equal to zero #
15068 # scale_to_zero_dst() - set dst operand exponent equal to zero #
15129 fbeq.w fsub_zero_exit # if result zero, end now
15161 # fmov.s &0x00000000,%fp0 # return zero in fp0
15314 # 0x8000000000000000 and this mantissa is the result of rounding non-zero
15916 andi.w &0x8000,FP_SCR0_EX(%a6) # zero src exponent
15952 andi.w &0x8000,FP_SCR1_EX(%a6) # zero dst exponent
18210 # If the data register holds a zero, then the #
18235 # if the bit string is a zero, then the operation is a no-op
19564 # unnorm_fix() - convert normalized number to denorm or zero #
19586 # FP_SRC(a6) and FP_DST(a6). If the instruction was opclass zero, load #
19592 # memory. Tag and fix both as above w/ opclass zero instructions. #
20596 # (3) if exp still equals zero, then insert original exponent
20657 clr.l %d0 # pass: zero g,r,s
20807 # (3) if exp still equals zero, then insert original exponent
20998 # add the extra condition that only if the k-factor was zero, too, should
20999 # we zero the exponent
21002 # "mantissa" is all zero which means that the answer is zero. but, the '040
21003 # algorithm allows the exponent to be non-zero. the 881/2 do not. Therefore,
21004 # if the mantissa is zero, I will zero the exponent, too.
21005 # the question now is whether the exponents sign bit is allowed to be non-zero
21006 # for a zero, also...
21065 # According to the index value in d1 which can range from zero #
21715 # simply calculate the sticky bit and zero the mantissa. otherwise
21920 # Return a zero mantissa with the sticky bit set
21993 # the entire mantissa is zero.
22001 # the entire mantissa is zero.
22053 tst.l %d0 # are G,R,S zero?
22350 clr.l FTEMP_LO(%a0) # lo(man) is now zero
22375 # zero; both the exponent and mantissa are changed. #
22388 bfffo FTEMP_LO(%a0){&0:&32}, %d0 # is operand really a zero?
22455 # whole mantissa is zero so this UNNORM is actually a zero
22458 and.w &0x8000, FTEMP_EX(%a0) # force exponent to zero
22480 # If it's an unnormalized zero, alter the operand and force it #
22481 # to be a normal zero. #
22512 # must convert to zero.
22518 # it's an "unnormalized zero". let's convert it to an actual zero...
22737 # the number may have become zero after rounding. set ccodes accordingly.
22740 tst.l FTEMP_HI(%a0) # is value now a zero?
22744 # bset &z_bit, FPSR_CC(%a6) # yes; set zero ccode bit
22745 bset &z_bit, %d0 # yes; set zero ccode bit
22797 # the number may have become zero after rounding. set ccodes accordingly.
22800 tst.l FTEMP_HI(%a0) # is value now a zero?
22804 # bset &z_bit,FPSR_CC(%a6) # yes; set zero ccode bit
22805 bset &z_bit,%d0 # yes; set zero ccode bit
22976 # The packed operand is a zero if the mantissa is all zero, else it's
22981 bne.b gp_not_spec # not a zero
22982 tst.l FP_SRC_HI(%a6) # is lw 2 zero?
22983 bne.b gp_not_spec # not a zero
22984 tst.l FP_SRC_LO(%a6) # is lw 3 zero?
22985 bne.b gp_not_spec # not a zero
23004 # Expected is a normal bcd (i.e. non-exceptional; all inf, zero, #
23023 # exponent equal to the exponent from A1 and the zero count #
23027 # SM = 0 a non-zero digit in the integer position #
23028 # SM = 1 a non-zero digit in Mant0, lsd of the fraction #
23105 clr.l %d1 # zero d1 for accumulator
23108 bfextu %d4{%d3:&4},%d0 # get the digit and zero extend into d0
23165 bfextu %d4{%d3:&4},%d0 # get the digit and zero extend
23200 # 3. Add one for each zero encountered until a non-zero digit.
23202 # 5. Check if the exp has crossed zero in #3 above; make the exp abs
23207 # 3. Add one for each zero encountered until a non-zero digit.
23209 # 5. Check if the exp has crossed zero in #3 above; clear SE.
23214 # exponent towards zero. Since all pwrten constants with a power
23222 # (*) d1: zero count
23243 clr.l %d1 # zero count reg
23246 bne.b ap_p_fx # if M16 is non-zero, go fix exp
23247 addq.l &1,%d1 # inc zero count
23250 bne.b ap_p_cl # if lw 2 is zero, skip it
23259 bne.b ap_p_fx # if non-zero, go to fix exp
23287 tst.l %d0 # check if d0 is zero
23298 bne.b ap_n_cl # if not zero, check digits
23307 bne.b ap_n_fx # if non-zero, go to exp fix
23335 tst.l %d0 # check if d0 is zero
23415 bcc.b e_next # if zero, skip the mul
23419 tst.l %d0 # check if d0 is zero
23420 bne.b e_loop # not zero, continue shifting
23648 bgt.b pos_exp # if greater than zero, it is a norm
23714 fmov.l &0,%fpsr # zero all of fpsr - nothing needed
23835 clr.w %d5 # set it zero initially
23862 bne.b not_rn # if zero, it is RN
23876 bcc.b e_next2 # if zero, skip the mul
23880 tst.l %d0 # test if ISCALE is zero
23898 # Check d2 for excess 10 exponential value. If not zero,
23964 mov.l &0x3fff0000,-(%sp) # force exp to zero
23972 mov.l &0x3fff0000,-(%sp) # force exp to zero
23975 mov.l &0x3fff0000,-(%sp)# force exp to zero
23985 beq.b A9_con # if zero, continue as normal
24127 bne not_zr # if non-zero, go to second test
24137 bcc.b l_next # if zero, skip the mul
24141 tst.l %d0 # test if LEN is zero
24188 bcc.b z_next # if zero, skip the mul
24192 tst.l %d0 # test if LEN is zero
24240 clr.l 4(%a0) # zero word 2 of FP_RES
24241 clr.l 8(%a0) # zero word 3 of FP_RES
24244 beq.b no_sft # if zero, don't shift
24254 tst.l %d2 # check for mantissa of zero
24256 tst.l %d3 # continue zero check
24257 beq.b zer_m # if zero, go directly to binstr
24259 clr.l %d1 # put zero in d1 for addx
24281 # is non-zero, OPERR is signaled. In all cases, all 4 digits are
24308 ftest.x %fp0 # test for zero
24309 fbeq.w den_zero # if zero, use k-factor or 4933
24323 ftest.x %fp0 # test for zero
24324 fbneq.w not_zero # if zero, force exponent
24336 beq.b x_loop_fin # if zero, skip the shift
24344 clr.l %d1 # put zero in d1 for addx
24357 tst.b %d0 # check if e4 is zero
24358 beq.b A16_st # if zero, skip rest
24489 # A6. Test d7. If zero, the digit formed is the ms digit. If non- #
24490 # zero, it is the ls digit. Put the digit in its place in the #
24494 # A7. Decrement d6 (LEN counter) and repeat the loop until zero. #
24555 tst.w %d7 # if zero, store digit & to loop
24556 beq.b first_d # if non-zero, form byte & write