Lines Matching refs:t1
56 csrwr t1, EXCEPTION_KS1
64 csrrd t1, LOONGARCH_CSR_PGDL
69 alsl.d t1, ra, t1, 3
71 ld.d t1, t1, 0
73 alsl.d t1, ra, t1, 3
76 ld.d t1, t1, 0
78 alsl.d t1, ra, t1, 3
80 ld.d ra, t1, 0
92 alsl.d t1, t0, ra, _PTE_T_LOG2
96 ll.d t0, t1, 0
98 ld.d t0, t1, 0
105 sc.d t0, t1, 0
108 st.d t0, t1, 0
111 bstrins.d t1, zero, 3, 3
112 ld.d t0, t1, 0
113 ld.d t1, t1, 8
115 csrwr t1, LOONGARCH_CSR_TLBELO1
119 csrrd t1, EXCEPTION_KS1
125 la.abs t1, swapper_pg_dir
132 ll.d ra, t1, 0
139 sc.d t0, t1, 0
145 st.d t0, t1, 0
148 csrrd t1, LOONGARCH_CSR_BADV
150 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
163 lu12i.w t1, _PAGE_HGLOBAL >> 12
164 and t1, t0, t1
165 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
166 or t0, t0, t1
172 addi.d t1, zero, 1
173 slli.d t1, t1, (HPAGE_SHIFT - 1)
174 add.d t0, t0, t1
179 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
180 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
185 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
186 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
189 csrrd t1, EXCEPTION_KS1
202 csrwr t1, LOONGARCH_CSR_KS1
209 csrwr t1, EXCEPTION_KS1
217 csrrd t1, LOONGARCH_CSR_PGDL
222 alsl.d t1, ra, t1, 3
224 ld.d t1, t1, 0
226 alsl.d t1, ra, t1, 3
229 ld.d t1, t1, 0
231 alsl.d t1, ra, t1, 3
233 ld.d ra, t1, 0
245 alsl.d t1, t0, ra, _PTE_T_LOG2
249 ll.d t0, t1, 0
251 ld.d t0, t1, 0
259 sc.d t0, t1, 0
262 st.d t0, t1, 0
265 bstrins.d t1, zero, 3, 3
266 ld.d t0, t1, 0
267 ld.d t1, t1, 8
269 csrwr t1, LOONGARCH_CSR_TLBELO1
273 csrrd t1, EXCEPTION_KS1
279 la.abs t1, swapper_pg_dir
286 ll.d ra, t1, 0
294 sc.d t0, t1, 0
300 st.d t0, t1, 0
303 csrrd t1, LOONGARCH_CSR_BADV
305 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
318 lu12i.w t1, _PAGE_HGLOBAL >> 12
319 and t1, t0, t1
320 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
321 or t0, t0, t1
327 addi.d t1, zero, 1
328 slli.d t1, t1, (HPAGE_SHIFT - 1)
329 add.d t0, t0, t1
334 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
335 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
341 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
342 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
345 csrrd t1, EXCEPTION_KS1
358 csrwr t1, LOONGARCH_CSR_KS1
365 csrwr t1, EXCEPTION_KS1
373 csrrd t1, LOONGARCH_CSR_PGDL
378 alsl.d t1, ra, t1, 3
380 ld.d t1, t1, 0
382 alsl.d t1, ra, t1, 3
385 ld.d t1, t1, 0
387 alsl.d t1, ra, t1, 3
389 ld.d ra, t1, 0
401 alsl.d t1, t0, ra, _PTE_T_LOG2
405 ll.d t0, t1, 0
407 ld.d t0, t1, 0
414 sc.d t0, t1, 0
417 st.d t0, t1, 0
420 bstrins.d t1, zero, 3, 3
421 ld.d t0, t1, 0
422 ld.d t1, t1, 8
424 csrwr t1, LOONGARCH_CSR_TLBELO1
428 csrrd t1, EXCEPTION_KS1
434 la.abs t1, swapper_pg_dir
441 ll.d ra, t1, 0
448 sc.d t0, t1, 0
454 st.d t0, t1, 0
457 csrrd t1, LOONGARCH_CSR_BADV
459 invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
472 lu12i.w t1, _PAGE_HGLOBAL >> 12
473 and t1, t0, t1
474 srli.d t1, t1, (_PAGE_HGLOBAL_SHIFT - _PAGE_GLOBAL_SHIFT)
475 or t0, t0, t1
481 addi.d t1, zero, 1
482 slli.d t1, t1, (HPAGE_SHIFT - 1)
483 add.d t0, t0, t1
488 addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
489 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
495 addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
496 csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
499 csrrd t1, EXCEPTION_KS1
512 csrwr t1, LOONGARCH_CSR_KS1