Lines Matching defs:size
100 int size, u32 *value)
103 devfn, where, size, value);
107 int size, u32 value)
110 devfn, where, size, value);
442 unsigned long size = vma->vm_end - vma->vm_start;
454 if (!valid_mmap_phys_addr_range(vma->vm_pgoff, size))
456 prot = phys_mem_access_prot(NULL, vma->vm_pgoff, size,
467 size, vma->vm_page_prot))
478 * @size: number of bytes to read
480 * Simply reads @size bytes from @port and puts the result in @val.
486 int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
488 int ret = size;
490 switch (size) {
513 * @size: number of bytes to write from @val
515 * Simply writes @size bytes of @val to @port.
517 int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
519 int ret = size;
521 switch (size) {
540 * set_pci_cacheline_size - determine cacheline size for PCI devices
542 * We want to use the line-size of the outer-most cache. We assume
543 * that this line-size is the same for all CPUs.