Lines Matching defs:isr

8  * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
233 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,
265 					(unsigned long *) isr, (unsigned long *) pr,
284 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
322 		       			"%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
323 		       			current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr);
328 	exception = fp_emulate(fp_fault, bundle, &regs->cr_ipsr, &regs->ar_fpsr, &isr, &regs->pr,
345 			if (isr & 0x11) {
347 			} else if (isr & 0x22) {
351 			} else if (isr & 0x44) {
356 					0, __ISR_VALID, isr);
367 			if (isr & 0x880) {
369 			} else if (isr & 0x1100) {
371 			} else if (isr & 0x2200) {
376 					0, __ISR_VALID, isr);
416 ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
420 	unsigned long code, error = isr, iip;
434 	if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {
447 		code = (isr >> 4) & 0xf;
449 			(code == 3) ? ((isr & (1UL << 37))
462 		if (isr & 2) {
473 			if (((isr >> 4) & 0xf) == 2) {
486 					vector, __ISR_VALID, isr);
496 					vector, __ISR_VALID, isr);
545 				0, __ISR_VALID, isr);
550 		result = handle_fpu_swa((vector == 32) ? 1 : 0, &regs, isr);
553 					0, __ISR_VALID, isr);
558 		if (isr & 0x2) {
590 		printk(KERN_ERR "  iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
591 		       iip, ifa, isr);
597 		printk(KERN_ERR "  iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
598 		       iip, ifa, isr, iim);
603 		sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);