Lines Matching defs:dscr
33 #include <asm/dscr.h>
114 static struct dscr_regs dscr;
121 if (dscr.locked[i].key && reg == dscr.locked[i].reg)
122 return &dscr.locked[i];
132 void __iomem *reg_addr = dscr.base + reg;
133 void __iomem *lock_addr = dscr.base + lock;
162 soc_writel(key0, dscr.base + lock0);
163 soc_writel(key1, dscr.base + lock1);
164 soc_writel(val, dscr.base + reg);
165 soc_writel(0, dscr.base + lock0);
166 soc_writel(0, dscr.base + lock1);
176 else if (dscr.kick_key[0])
177 dscr_write_locked2(reg, val, dscr.kick_reg[0], dscr.kick_key[0],
178 dscr.kick_reg[1], dscr.kick_key[1]);
180 soc_writel(val, dscr.base + reg);
196 if (!dscr.base)
202 info = &dscr.devstate_info[id];
225 spin_lock_irqsave(&dscr.lock, flags);
227 val = soc_readl(dscr.base + ctl->reg);
233 spin_unlock_irqrestore(&dscr.lock, flags);
246 val = soc_readl(dscr.base + stat->reg);
265 r = &dscr.rmii_resets[id];
269 spin_lock_irqsave(&dscr.lock, flags);
271 val = soc_readl(dscr.base + r->reg);
277 spin_unlock_irqrestore(&dscr.lock, flags);
287 err = of_property_read_u32_array(node, "ti,dscr-devstat", &val, 1);
299 err = of_property_read_u32_array(node, "ti,dscr-silicon-rev", vals, 3);
309 * an ethernet MAC address. The "ti,dscr-mac-fuse-regs"
313 * ti,dscr-mac-fuse-regs = <reg0 b3 b2 b1 b0
330 err = of_property_read_u32_array(node, "ti,dscr-mac-fuse-regs",
350 p = of_get_property(node, "ti,dscr-rmii-resets", &size);
358 dscr.rmii_resets[i].reg = be32_to_cpup(p++);
359 dscr.rmii_resets[i].mask = be32_to_cpup(p++);
371 err = of_property_read_u32_array(node, "ti,dscr-privperm", vals, 2);
380 * regisers can be described with the "ti,dscr-locked-regs" property.
384 * ti,dscr-locked-regs = <reg0 lockreg0 key0
400 p = of_get_property(node, "ti,dscr-locked-regs", &size);
408 r = &dscr.locked[i];
420 * and the key values can be parsed from a "ti,dscr-kick-regs"
423 * ti,dscr-kick-regs = <kickreg0 key0 kickreg1 key1>
434 err = of_property_read_u32_array(node, "ti,dscr-kick-regs", vals, 4);
436 dscr.kick_reg[0] = vals[0];
437 dscr.kick_key[0] = vals[1];
438 dscr.kick_reg[1] = vals[2];
439 dscr.kick_key[1] = vals[3];
451 * The layout of these bitfields is described by the ti,dscr-devstate-ctl-regs
473 p = of_get_property(node, "ti,dscr-devstate-ctl-regs", &size);
481 r = &dscr.devctl[i];
496 dscr.devstate_info[j].ctl = r;
507 * The layout of these bitfields is described by the ti,dscr-devstate-stat-regs
529 p = of_get_property(node, "ti,dscr-devstate-stat-regs", &size);
537 r = &dscr.devstat[i];
550 dscr.devstate_info[j].stat = r;
556 { .compatible = "ti,c64x+dscr" },
572 spin_lock_init(&dscr.lock);
584 dscr.base = base;