Lines Matching defs:vmcr
416 void __vgic_v3_write_vmcr(u32 vmcr)
418 write_gicreg(vmcr, ICH_VMCR_EL2);
437 static int __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr,
453 if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK))
457 if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK))
528 static unsigned int __vgic_v3_get_bpr0(u32 vmcr)
530 return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;
533 static unsigned int __vgic_v3_get_bpr1(u32 vmcr)
537 if (vmcr & ICH_VMCR_CBPR_MASK) {
538 bpr = __vgic_v3_get_bpr0(vmcr);
542 bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT;
552 static u8 __vgic_v3_pri_to_pre(u8 pri, u32 vmcr, int grp)
557 bpr = __vgic_v3_get_bpr0(vmcr) + 1;
559 bpr = __vgic_v3_get_bpr1(vmcr);
570 static void __vgic_v3_set_active_priority(u8 pri, u32 vmcr, int grp)
576 pre = __vgic_v3_pri_to_pre(pri, vmcr, grp);
627 static void __vgic_v3_read_iar(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
635 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
642 pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
647 if (__vgic_v3_get_highest_active_priority() <= __vgic_v3_pri_to_pre(lr_prio, vmcr, grp))
655 __vgic_v3_set_active_priority(lr_prio, vmcr, grp);
685 static void __vgic_v3_write_dir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
692 if (!(vmcr & ICH_VMCR_EOIM_MASK))
708 static void __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
725 if (vmcr & ICH_VMCR_EOIM_MASK)
738 __vgic_v3_pri_to_pre(lr_prio, vmcr, grp) != act_prio)
745 static void __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
747 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));
750 static void __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
752 vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK));
755 static void __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
760 vmcr |= ICH_VMCR_ENG0_MASK;
762 vmcr &= ~ICH_VMCR_ENG0_MASK;
764 __vgic_v3_write_vmcr(vmcr);
767 static void __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
772 vmcr |= ICH_VMCR_ENG1_MASK;
774 vmcr &= ~ICH_VMCR_ENG1_MASK;
776 __vgic_v3_write_vmcr(vmcr);
779 static void __vgic_v3_read_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
781 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr));
784 static void __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
786 vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));
789 static void __vgic_v3_write_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
800 vmcr &= ~ICH_VMCR_BPR0_MASK;
801 vmcr |= val;
803 __vgic_v3_write_vmcr(vmcr);
806 static void __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
811 if (vmcr & ICH_VMCR_CBPR_MASK)
820 vmcr &= ~ICH_VMCR_BPR1_MASK;
821 vmcr |= val;
823 __vgic_v3_write_vmcr(vmcr);
849 u32 vmcr, int rt)
855 u32 vmcr, int rt)
860 static void __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
865 static void __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
870 static void __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
875 static void __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
880 static void __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
885 static void __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
890 static void __vgic_v3_read_hppir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
897 lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);
909 static void __vgic_v3_read_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
911 vmcr &= ICH_VMCR_PMR_MASK;
912 vmcr >>= ICH_VMCR_PMR_SHIFT;
913 vcpu_set_reg(vcpu, rt, vmcr);
916 static void __vgic_v3_write_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
922 vmcr &= ~ICH_VMCR_PMR_MASK;
923 vmcr |= val;
925 write_gicreg(vmcr, ICH_VMCR_EL2);
928 static void __vgic_v3_read_rpr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
934 static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
948 val |= ((vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT) << ICC_CTLR_EL1_EOImode_SHIFT;
950 val |= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT;
955 static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
960 vmcr |= ICH_VMCR_CBPR_MASK;
962 vmcr &= ~ICH_VMCR_CBPR_MASK;
965 vmcr |= ICH_VMCR_EOIM_MASK;
967 vmcr &= ~ICH_VMCR_EOIM_MASK;
969 write_gicreg(vmcr, ICH_VMCR_EL2);
976 u32 vmcr;
1092 vmcr = __vgic_v3_read_vmcr();
1094 fn(vcpu, vmcr, rt);