Lines Matching refs:lch
67 static void omap_clear_dma(int lch);
91 static inline void disable_lnk(int lch);
92 static void omap_disable_channel_irq(int lch);
93 static inline void omap_enable_channel_irq(int lch);
124 void omap_set_dma_priority(int lch, int dst_port, int priority)
156 void omap_set_dma_priority(int lch, int dst_port, int priority)
160 ccr = p->dma_read(CCR, lch);
165 p->dma_write(ccr, CCR, lch);
170 void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
176 l = p->dma_read(CSDP, lch);
179 p->dma_write(l, CSDP, lch);
184 ccr = p->dma_read(CCR, lch);
188 p->dma_write(ccr, CCR, lch);
190 ccr = p->dma_read(CCR2, lch);
194 p->dma_write(ccr, CCR2, lch);
200 val = p->dma_read(CCR, lch);
225 p->dma_write(val, CCR, lch);
228 p->dma_write(elem_count, CEN, lch);
229 p->dma_write(frame_count, CFN, lch);
233 void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
238 l = p->dma_read(LCH_CTRL, lch);
241 p->dma_write(l, LCH_CTRL, lch);
247 void omap_set_dma_src_params(int lch, int src_port, int src_amode,
256 w = p->dma_read(CSDP, lch);
259 p->dma_write(w, CSDP, lch);
262 l = p->dma_read(CCR, lch);
265 p->dma_write(l, CCR, lch);
267 p->dma_write(src_start, CSSA, lch);
269 p->dma_write(src_ei, CSEI, lch);
270 p->dma_write(src_fi, CSFI, lch);
274 void omap_set_dma_src_data_pack(int lch, int enable)
278 l = p->dma_read(CSDP, lch);
282 p->dma_write(l, CSDP, lch);
286 void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
291 l = p->dma_read(CSDP, lch);
325 p->dma_write(l, CSDP, lch);
330 void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
337 l = p->dma_read(CSDP, lch);
340 p->dma_write(l, CSDP, lch);
343 l = p->dma_read(CCR, lch);
346 p->dma_write(l, CCR, lch);
348 p->dma_write(dest_start, CDSA, lch);
350 p->dma_write(dst_ei, CDEI, lch);
351 p->dma_write(dst_fi, CDFI, lch);
355 void omap_set_dma_dest_data_pack(int lch, int enable)
359 l = p->dma_read(CSDP, lch);
363 p->dma_write(l, CSDP, lch);
367 void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
372 l = p->dma_read(CSDP, lch);
403 p->dma_write(l, CSDP, lch);
407 static inline void omap_enable_channel_irq(int lch)
411 p->dma_read(CSR, lch);
413 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
416 p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
419 static inline void omap_disable_channel_irq(int lch)
422 p->dma_write(0, CICR, lch);
425 p->dma_read(CSR, lch);
427 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
430 void omap_disable_dma_irq(int lch, u16 bits)
432 dma_chan[lch].enabled_irqs &= ~bits;
436 static inline void enable_lnk(int lch)
440 l = p->dma_read(CLNK_CTRL, lch);
446 if (dma_chan[lch].next_lch != -1)
447 l = dma_chan[lch].next_lch | (1 << 15);
449 p->dma_write(l, CLNK_CTRL, lch);
452 static inline void disable_lnk(int lch)
456 l = p->dma_read(CLNK_CTRL, lch);
459 omap_disable_channel_irq(lch);
471 p->dma_write(l, CLNK_CTRL, lch);
472 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
476 void (*callback)(int lch, u16 ch_status, void *data),
536 void omap_free_dma(int lch)
540 if (dma_chan[lch].dev_id == -1) {
542 lch);
547 omap_disable_channel_irq(lch);
550 p->dma_write(0, CCR, lch);
553 dma_chan[lch].dev_id = -1;
554 dma_chan[lch].next_lch = -1;
555 dma_chan[lch].callback = NULL;
564 static void omap_clear_dma(int lch)
569 p->clear_dma(lch);
573 void omap_start_dma(int lch)
582 p->dma_write(0, CPC, lch);
584 p->dma_write(0, CDAC, lch);
586 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
591 enable_lnk(lch);
594 dma_chan_link_map[lch] = 1;
596 cur_lch = dma_chan[lch].next_lch;
612 p->dma_write(lch, CLNK_CTRL, lch);
614 omap_enable_channel_irq(lch);
616 l = p->dma_read(CCR, lch);
629 p->dma_write(l, CCR, lch);
631 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
635 void omap_stop_dma(int lch)
640 omap_disable_channel_irq(lch);
642 l = p->dma_read(CCR, lch);
649 l = p->dma_read(OCP_SYSCONFIG, lch);
655 l = p->dma_read(CCR, lch);
657 p->dma_write(l, CCR, lch);
660 l = p->dma_read(CCR, lch);
665 l = p->dma_read(CCR, lch);
668 pr_err("DMA drain did not complete on lch %d\n", lch);
670 p->dma_write(sys_cf, OCP_SYSCONFIG, lch);
673 p->dma_write(l, CCR, lch);
683 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
684 int next_lch, cur_lch = lch;
702 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
718 dma_addr_t omap_get_dma_src_pos(int lch)
723 offset = p->dma_read(CPC, lch);
725 offset = p->dma_read(CSAC, lch);
728 offset = p->dma_read(CSAC, lch);
736 if (likely(p->dma_read(CDAC, lch)))
737 offset = p->dma_read(CSAC, lch);
739 offset = p->dma_read(CSSA, lch);
743 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
757 dma_addr_t omap_get_dma_dst_pos(int lch)
762 offset = p->dma_read(CPC, lch);
764 offset = p->dma_read(CDAC, lch);
771 offset = p->dma_read(CDAC, lch);
778 offset = p->dma_read(CDSA, lch);
782 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
788 int omap_get_dma_active_status(int lch)
790 return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;
796 int lch;
802 for (lch = 0; lch < dma_chan_count; lch++)
803 if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN)