Lines Matching defs:S3C24XX_GPIOREG2
15 #define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
27 * S3C24XX_GPIOREG2 is for the second set of registers in the
31 #define S3C24XX_GPIOREG2(x) ((x) + S3C24XX_VA_GPIO2)
517 #define S3C24XX_EXTINT0 S3C24XX_GPIOREG2(0x88)
518 #define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C)
519 #define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90)
527 #define S3C24XX_EINFLT0 S3C24XX_GPIOREG2(0x94)
528 #define S3C24XX_EINFLT1 S3C24XX_GPIOREG2(0x98)
529 #define S3C24XX_EINFLT2 S3C24XX_GPIOREG2(0x9C)
530 #define S3C24XX_EINFLT3 S3C24XX_GPIOREG2(0xA0)
556 #define S3C24XX_GSTATUS0 S3C24XX_GPIOREG2(0x0AC)
557 #define S3C24XX_GSTATUS1 S3C24XX_GPIOREG2(0x0B0)
558 #define S3C24XX_GSTATUS2 S3C24XX_GPIOREG2(0x0B4)
559 #define S3C24XX_GSTATUS3 S3C24XX_GPIOREG2(0x0B8)
560 #define S3C24XX_GSTATUS4 S3C24XX_GPIOREG2(0x0BC)