Lines Matching refs:inst
31 static u32 am33xx_prm_read_reg(s16 inst, u16 idx)
33 return readl_relaxed(prm_base.va + inst + idx);
37 static void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
39 writel_relaxed(val, prm_base.va + inst + idx);
43 static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
47 v = am33xx_prm_read_reg(inst, idx);
50 am33xx_prm_write_reg(v, inst, idx);
60 * @inst: CM instance register offset (*_INST macro)
67 static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
72 v = am33xx_prm_read_reg(inst, rstctrl_offs);
83 * @inst: CM instance register offset (*_INST macro)
93 static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
98 am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs);
109 * @inst: CM instance register offset (*_INST macro)
123 s16 inst, u16 rstctrl_offs,
130 if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0)
134 am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
139 am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
142 omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, 0, inst,