Lines Matching refs:reset
29 * and reset signaling, supply power, and connect the modules to
36 * to reset, enable, idle, and disable these hardware blocks. And
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
96 * reset and the integration registers programmed, the INITIALIZED state
179 * Address offset (in bytes) between the reset control and the reset
208 * struct omap_hwmod_reset - IP specific reset functions
211 * @reset: IP specific reset function
218 int (*reset)(struct omap_hwmod *oh);
1182 * Wait until reset has completed, this is needed as the IP
1183 * block is reset automatically by hardware in some cases
1430 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1432 * @name: name of the reset line in the context of this hwmod
1435 * Return the bit position of the reset line that match the
1460 * _assert_hardreset - assert the HW reset line of submodules
1463 * @name: name of the reset line to lookup and assert
1466 * reset line to be assert / deassert in order to enable fully the IP.
1493 * _deassert_hardreset - deassert the HW reset line of submodules contained
1496 * @name: name of the reset line to look up and deassert
1499 * reset line to be assert / deassert in order to enable fully the IP.
1522 * A clockdomain must be in SW_SUP otherwise reset
1562 * _read_hardreset - read the HW reset line state of submodules
1565 * @name: name of the reset line to look up and read
1567 * Return the state of the reset line. Returns -EINVAL if @oh is
1592 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1620 * hard-reset
1677 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1682 * reset this way, -EINVAL if the hwmod is in the wrong state,
1683 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1685 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1689 * Note that some IP like McBSP do have reset control but don't have
1690 * reset status.
1704 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1754 * _reset - reset an omap_hwmod
1757 * Resets an omap_hwmod @oh. If the module has a custom reset
1758 * function pointer defined, then call it to reset the IP block, and
1761 * associated with it, call a function to reset the IP block via that
1768 * The default software reset mechanism for most OMAP IP blocks is
1770 * hwmods cannot be reset via this method. Some are not targets and
1772 * IVA) have idiosyncratic reset sequences. So for these relatively
1773 * rare cases, custom reset code can be supplied in the struct
1774 * omap_hwmod_class .reset function pointer.
1782 * custom reset function - these must return -EINVAL if the hwmod
1783 * cannot be reset this way or if the hwmod is in the wrong state,
1784 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1792 if (oh->class->reset) {
1793 r = oh->class->reset(oh);
1889 * If an IP block contains HW reset lines and all of them are
2321 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2424 * _setup_reset - reset an IP block during the setup process
2429 * reset. Returns 0 upon success or a negative error code upon
2445 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2476 * included, since the WDTIMER starts running on reset and will reset
2482 * should be possible to replace this mechanism with a "lazy reset"
2483 * arrangement. In a "lazy reset" setup, each IP block is enabled
2487 * preconditions have been met, since otherwise the late reset code
2533 * flags. IP blocks are reset to prevent any previous configuration
2535 * with power management or other parts of the system. The reset can
2938 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2943 * doing the necessary settings could use this function to start a reset by
3494 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3498 { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
3502 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3503 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3504 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3505 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3520 oh->class->reset = quirk->reset;
3642 * early concole so that hwmod core doesn't reset and keep it in idle
3845 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3848 * @name: name of the reset line to lookup and assert
3851 * an HW reset line to be assert / deassert in order to enable fully
3872 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3875 * @name: name of the reset line to look up and deassert
3878 * an HW reset line to be assert / deassert in order to enable fully