Lines Matching refs:inst
51 static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx)
53 return readl_relaxed(cm_base.va + inst + idx);
57 static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx)
59 writel_relaxed(val, cm_base.va + inst + idx);
63 static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
67 v = am33xx_cm_read_reg(inst, idx);
70 am33xx_cm_write_reg(v, inst, idx);
75 static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
79 v = am33xx_cm_read_reg(inst, idx);
88 * @inst: CM instance register offset (*_INST macro)
94 static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
96 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
104 * @inst: CM instance register offset (*_INST macro)
110 static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
114 v = _clkctrl_idlest(inst, clkctrl_offs);
123 * @inst: CM instance register offset (*_INST macro)
129 static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
133 v = am33xx_cm_read_reg(inst, cdoffs);
136 am33xx_cm_write_reg(v, inst, cdoffs);
143 * @inst: CM instance register offset (*_INST macro)
146 * Returns true if the clockdomain referred to by (@inst, @cdoffs)
149 static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
153 v = am33xx_cm_read_reg(inst, cdoffs);
162 * @inst: CM instance register offset (*_INST macro)
165 * Put a clockdomain referred to by (@inst, @cdoffs) into
168 static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
170 _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
175 * @inst: CM instance register offset (*_INST macro)
178 * Put a clockdomain referred to by (@inst, @cdoffs) into
182 static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
184 _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
189 * @inst: CM instance register offset (*_INST macro)
192 * Put a clockdomain referred to by (@inst, @cdoffs) into idle
195 static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
197 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
202 * @inst: CM instance register offset (*_INST macro)
205 * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
208 static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
210 _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
220 * @inst: CM instance register offset (*_INST macro)
229 static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
234 omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
244 * @inst: CM instance register offset (*_INST macro)
252 static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
257 omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
268 * @inst: CM instance register offset (*_INST macro)
273 static void am33xx_cm_module_enable(u8 mode, u8 part, u16 inst,
278 v = am33xx_cm_read_reg(inst, clkctrl_offs);
281 am33xx_cm_write_reg(v, inst, clkctrl_offs);
287 * @inst: CM instance register offset (*_INST macro)
292 static void am33xx_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
296 v = am33xx_cm_read_reg(inst, clkctrl_offs);
298 am33xx_cm_write_reg(v, inst, clkctrl_offs);
347 static u32 am33xx_cm_xlate_clkctrl(u8 part, u16 inst, u16 offset)
349 return cm_base.pa + inst + offset;