Lines Matching refs:clk
17 #include <linux/clk.h>
31 struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
41 unsigned long omap1_uart_recalc(struct clk *clk)
43 unsigned int val = __raw_readl(clk->enable_reg);
44 return val & 1 << clk->enable_bit ? 48000000 : 12000000;
47 unsigned long omap1_sossi_recalc(struct clk *clk)
54 return clk->parent->rate / div;
57 static void omap1_clk_allow_idle(struct clk *clk)
59 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
61 if (!(clk->flags & CLOCK_IDLE_CONTROL))
68 static void omap1_clk_deny_idle(struct clk *clk)
70 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
72 if (!(clk->flags & CLOCK_IDLE_CONTROL))
132 static int calc_dsor_exp(struct clk *clk, unsigned long rate)
146 struct clk * parent;
149 parent = clk->parent;
164 unsigned long omap1_ckctl_recalc(struct clk *clk)
167 int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
169 return clk->parent->rate / dsor;
172 unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
184 dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
187 return clk->parent->rate / dsor;
191 int omap1_select_table_rate(struct clk *clk, unsigned long rate)
226 int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
231 dsor_exp = calc_dsor_exp(clk, rate);
238 regval &= ~(3 << clk->rate_offset);
239 regval |= dsor_exp << clk->rate_offset;
241 clk->rate = clk->parent->rate / (1 << dsor_exp);
246 long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
248 int dsor_exp = calc_dsor_exp(clk, rate);
253 return clk->parent->rate / (1 << dsor_exp);
256 int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
261 dsor_exp = calc_dsor_exp(clk, rate);
268 regval &= ~(3 << clk->rate_offset);
269 regval |= dsor_exp << clk->rate_offset;
272 clk->rate = clk->parent->rate / (1 << dsor_exp);
276 long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
327 int omap1_set_uart_rate(struct clk *clk, unsigned long rate)
331 val = __raw_readl(clk->enable_reg);
333 val &= ~(1 << clk->enable_bit);
335 val |= (1 << clk->enable_bit);
338 __raw_writel(val, clk->enable_reg);
339 clk->rate = rate;
345 int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate)
351 clk->rate = 96000000 / dsor;
357 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
358 __raw_writew(ratio_bits, clk->enable_reg);
363 int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
369 p_rate = clk->parent->rate;
381 clk->rate = p_rate / (div + 1);
386 long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate)
391 void omap1_init_ext_clk(struct clk *clk)
397 ratio_bits = __raw_readw(clk->enable_reg) & ~1;
398 __raw_writew(ratio_bits, clk->enable_reg);
406 clk-> rate = 96000000 / dsor;
409 int omap1_clk_enable(struct clk *clk)
413 if (clk->usecount++ == 0) {
414 if (clk->parent) {
415 ret = omap1_clk_enable(clk->parent);
419 if (clk->flags & CLOCK_NO_IDLE_PARENT)
420 omap1_clk_deny_idle(clk->parent);
423 ret = clk->ops->enable(clk);
425 if (clk->parent)
426 omap1_clk_disable(clk->parent);
433 clk->usecount--;
437 void omap1_clk_disable(struct clk *clk)
439 if (clk->usecount > 0 && !(--clk->usecount)) {
440 clk->ops->disable(clk);
441 if (likely(clk->parent)) {
442 omap1_clk_disable(clk->parent);
443 if (clk->flags & CLOCK_NO_IDLE_PARENT)
444 omap1_clk_allow_idle(clk->parent);
449 static int omap1_clk_enable_generic(struct clk *clk)
454 if (unlikely(clk->enable_reg == NULL)) {
456 clk->name);
460 if (clk->flags & ENABLE_REG_32BIT) {
461 regval32 = __raw_readl(clk->enable_reg);
462 regval32 |= (1 << clk->enable_bit);
463 __raw_writel(regval32, clk->enable_reg);
465 regval16 = __raw_readw(clk->enable_reg);
466 regval16 |= (1 << clk->enable_bit);
467 __raw_writew(regval16, clk->enable_reg);
473 static void omap1_clk_disable_generic(struct clk *clk)
478 if (clk->enable_reg == NULL)
481 if (clk->flags & ENABLE_REG_32BIT) {
482 regval32 = __raw_readl(clk->enable_reg);
483 regval32 &= ~(1 << clk->enable_bit);
484 __raw_writel(regval32, clk->enable_reg);
486 regval16 = __raw_readw(clk->enable_reg);
487 regval16 &= ~(1 << clk->enable_bit);
488 __raw_writew(regval16, clk->enable_reg);
497 static int omap1_clk_enable_dsp_domain(struct clk *clk)
503 retval = omap1_clk_enable_generic(clk);
510 static void omap1_clk_disable_dsp_domain(struct clk *clk)
513 omap1_clk_disable_generic(clk);
524 static int omap1_clk_enable_uart_functional_16xx(struct clk *clk)
529 ret = omap1_clk_enable_generic(clk);
532 uclk = (struct uart_clk *)clk;
541 static void omap1_clk_disable_uart_functional_16xx(struct clk *clk)
546 uclk = (struct uart_clk *)clk;
549 omap1_clk_disable_generic(clk);
558 long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
560 if (clk->round_rate != NULL)
561 return clk->round_rate(clk, rate);
563 return clk->rate;
566 int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
570 if (clk->set_rate)
571 ret = clk->set_rate(clk, rate);
581 void omap1_clk_disable_unused(struct clk *clk)
587 if (clk->enable_reg == DSP_IDLECT2) {
589 clk->name);
594 if (clk->flags & ENABLE_REG_32BIT)
595 regval32 = __raw_readl(clk->enable_reg);
597 regval32 = __raw_readw(clk->enable_reg);
599 if ((regval32 & (1 << clk->enable_bit)) == 0)
602 printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
603 clk->ops->disable(clk);
610 int clk_enable(struct clk *clk)
615 if (clk == NULL || IS_ERR(clk))
619 ret = omap1_clk_enable(clk);
626 void clk_disable(struct clk *clk)
630 if (clk == NULL || IS_ERR(clk))
634 if (clk->usecount == 0) {
636 clk->name);
641 omap1_clk_disable(clk);
648 unsigned long clk_get_rate(struct clk *clk)
653 if (clk == NULL || IS_ERR(clk))
657 ret = clk->rate;
665 * Optional clock functions defined in include/linux/clk.h
668 long clk_round_rate(struct clk *clk, unsigned long rate)
673 if (clk == NULL || IS_ERR(clk))
677 ret = omap1_clk_round_rate(clk, rate);
684 int clk_set_rate(struct clk *clk, unsigned long rate)
689 if (clk == NULL || IS_ERR(clk))
693 ret = omap1_clk_set_rate(clk, rate);
695 propagate_rate(clk);
702 int clk_set_parent(struct clk *clk, struct clk *parent)
710 struct clk *clk_get_parent(struct clk *clk)
712 return clk->parent;
721 unsigned long followparent_recalc(struct clk *clk)
723 return clk->parent->rate;
730 unsigned long omap_fixed_divisor_recalc(struct clk *clk)
732 WARN_ON(!clk->fixed_div);
734 return clk->parent->rate / clk->fixed_div;
737 void clk_reparent(struct clk *child, struct clk *parent)
749 void propagate_rate(struct clk *tclk)
751 struct clk *clkp;
771 struct clk *clkp;
781 * clk_preinit - initialize any fields in the struct clk before clk init
782 * @clk: struct clk * to initialize
784 * Initialize any struct clk fields needed before normal clk initialization
787 void clk_preinit(struct clk *clk)
789 INIT_LIST_HEAD(&clk->children);
792 int clk_register(struct clk *clk)
794 if (clk == NULL || IS_ERR(clk))
800 if (clk->node.next || clk->node.prev)
804 if (clk->parent)
805 list_add(&clk->sibling, &clk->parent->children);
807 list_add(&clk->sibling, &root_clks);
809 list_add(&clk->node, &clocks);
810 if (clk->init)
811 clk->init(clk);
818 void clk_unregister(struct clk *clk)
820 if (clk == NULL || IS_ERR(clk))
824 list_del(&clk->sibling);
825 list_del(&clk->node);
832 struct clk *clkp;
840 * omap_clk_get_by_name - locate OMAP struct clk by its name
841 * @name: name of the struct clk to locate
843 * Locate an OMAP struct clk by its name. Assumes that struct clk
845 * struct clk if found.
847 struct clk *omap_clk_get_by_name(const char *name)
849 struct clk *c;
850 struct clk *ret = NULL;
868 struct clk *c;
884 struct clk *c;
901 static int clkll_enable_null(struct clk *clk)
906 static void clkll_disable_null(struct clk *clk)
920 struct clk dummy_ck = {
935 struct clk *ck;
970 struct clk *c;
971 struct clk *pa;
990 static void clk_debugfs_register_one(struct clk *c)
993 struct clk *pa = c->parent;
1003 static void clk_debugfs_register(struct clk *c)
1005 struct clk *pa = c->parent;
1016 struct clk *c;