Lines Matching defs:dsor
167 int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
169 return clk->parent->rate / dsor;
174 int dsor;
184 dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
187 return clk->parent->rate / dsor;
306 unsigned dsor;
309 * freq = 96MHz / dsor
311 * RATIO_SEL range: dsor <-> RATIO_SEL
312 * 0..6: (RATIO_SEL+2) <-> (dsor-2)
313 * 6..48: (8+(RATIO_SEL-6)*2) <-> ((dsor-8)/2+6)
314 * Minimum dsor is 2 and maximum is 96. Odd divisors starting from 9
317 for (dsor = 2; dsor < 96; ++dsor) {
318 if ((dsor & 1) && dsor > 8)
320 if (rate >= 96000000 / dsor)
323 return dsor;
347 unsigned dsor;
350 dsor = calc_ext_dsor(rate);
351 clk->rate = 96000000 / dsor;
352 if (dsor > 8)
353 ratio_bits = ((dsor - 8) / 2 + 6) << 2;
355 ratio_bits = (dsor - 2) << 2;
393 unsigned dsor;
402 dsor = (ratio_bits - 6) * 2 + 8;
404 dsor = ratio_bits + 2;
406 clk-> rate = 96000000 / dsor;