Lines Matching refs:mmp_timer_base
43 static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
55 __raw_writel(1, mmp_timer_base + TMR_CVWR(1));
58 val = __raw_readl(mmp_timer_base + TMR_CVWR(1));
75 __raw_writel(0x01, mmp_timer_base + TMR_ICR(0));
80 __raw_writel(0x02, mmp_timer_base + TMR_CER);
97 __raw_writel(0x02, mmp_timer_base + TMR_CER);
102 __raw_writel(0x01, mmp_timer_base + TMR_ICR(0));
103 __raw_writel(0x01, mmp_timer_base + TMR_IER(0));
108 __raw_writel(delta - 1, mmp_timer_base + TMR_TN_MM(0, 0));
113 __raw_writel(0x03, mmp_timer_base + TMR_CER);
126 __raw_writel(0x00, mmp_timer_base + TMR_IER(0));
156 uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR);
158 __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */
163 __raw_writel(ccr, mmp_timer_base + TMR_CCR);
166 __raw_writel(0x2, mmp_timer_base + TMR_CMR);
168 __raw_writel(0x1, mmp_timer_base + TMR_PLCR(0)); /* periodic */
169 __raw_writel(0x7, mmp_timer_base + TMR_ICR(0)); /* clear status */
170 __raw_writel(0x0, mmp_timer_base + TMR_IER(0));
172 __raw_writel(0x0, mmp_timer_base + TMR_PLCR(1)); /* free-running */
173 __raw_writel(0x7, mmp_timer_base + TMR_ICR(1)); /* clear status */
174 __raw_writel(0x0, mmp_timer_base + TMR_IER(1));
177 __raw_writel(0x2, mmp_timer_base + TMR_CER);
218 mmp_timer_base = of_iomap(np, 0);
219 if (!mmp_timer_base)