Lines Matching refs:apcr
29 uint32_t awucrm = 0, apcr = 0;
37 apcr |= MPMU_APCR_SLPWP2;
42 apcr |= MPMU_APCR_SLPWP3;
46 apcr |= MPMU_APCR_SLPWP3;
50 apcr |= MPMU_APCR_SLPWP3;
55 apcr |= MPMU_APCR_SLPWP4;
59 apcr |= MPMU_APCR_SLPWP4;
63 apcr |= MPMU_APCR_SLPWP4;
67 apcr |= MPMU_APCR_SLPWP4;
71 apcr |= MPMU_APCR_SLPWP4;
75 apcr |= MPMU_APCR_SLPWP4;
79 apcr |= MPMU_APCR_SLPWP4;
85 apcr |= MPMU_APCR_SLPWP5;
92 apcr |= MPMU_APCR_SLPWP6;
97 apcr |= MPMU_APCR_SLPWP7;
102 apcr |= MPMU_APCR_SLPWP2;
115 if (apcr) {
116 apcr = ~apcr & __raw_readl(MPMU_APCR);
117 __raw_writel(apcr, MPMU_APCR);
124 if (apcr) {
125 apcr |= __raw_readl(MPMU_APCR);
126 __raw_writel(apcr, MPMU_APCR);
134 uint32_t idle_cfg, apcr;
137 apcr = __raw_readl(MPMU_APCR);
139 apcr &= ~(MPMU_APCR_DDRCORSD | MPMU_APCR_APBSD | MPMU_APCR_AXISD
147 apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
150 apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
151 apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
154 apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
157 apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
175 apcr |= MPMU_APCR_DSPSD | MPMU_APCR_DTCMSD | MPMU_APCR_BBSD
179 apcr |= MPMU_APCR_SLPEN;
183 __raw_writel(apcr, MPMU_APCR);