Lines Matching refs:val
234 u32 val = readl_relaxed(ccm_base + CGPR);
236 val &= ~BM_CGPR_INT_MEM_CLK_LPM;
238 val |= BM_CGPR_INT_MEM_CLK_LPM;
239 writel_relaxed(val, ccm_base + CGPR);
244 u32 val;
253 val = readl_relaxed(ccm_base + CCR);
254 val &= ~BM_CCR_RBC_EN;
255 val |= enable ? BM_CCR_RBC_EN : 0;
256 writel_relaxed(val, ccm_base + CCR);
259 val = readl_relaxed(ccm_base + CCR);
260 val &= ~BM_CCR_RBC_BYPASS_COUNT;
261 val |= enable ? BM_CCR_RBC_BYPASS_COUNT : 0;
262 writel(val, ccm_base + CCR);
277 u32 val;
280 val = readl_relaxed(ccm_base + CLPCR);
281 val &= ~BM_CLPCR_WB_PER_AT_LPM;
282 val |= enable ? BM_CLPCR_WB_PER_AT_LPM : 0;
283 writel_relaxed(val, ccm_base + CLPCR);
286 val = readl_relaxed(ccm_base + CCR);
287 val &= ~BM_CCR_WB_COUNT;
288 val |= enable ? BM_CCR_WB_COUNT : 0;
289 writel_relaxed(val, ccm_base + CCR);
294 u32 val = readl_relaxed(ccm_base + CLPCR);
296 val &= ~BM_CLPCR_LPM;
301 val |= 0x1 << BP_CLPCR_LPM;
302 val |= BM_CLPCR_ARM_CLK_DIS_ON_LPM;
305 val |= 0x2 << BP_CLPCR_LPM;
306 val &= ~BM_CLPCR_VSTBY;
307 val &= ~BM_CLPCR_SBYOS;
309 val |= BM_CLPCR_BYPASS_PMIC_READY;
312 val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
314 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
317 val |= 0x1 << BP_CLPCR_LPM;
318 val &= ~BM_CLPCR_VSTBY;
319 val &= ~BM_CLPCR_SBYOS;
322 val |= 0x2 << BP_CLPCR_LPM;
323 val |= 0x3 << BP_CLPCR_STBY_COUNT;
324 val |= BM_CLPCR_VSTBY;
325 val |= BM_CLPCR_SBYOS;
327 val |= BM_CLPCR_BYPASS_PMIC_READY;
330 val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
332 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
354 writel_relaxed(val, ccm_base + CLPCR);
361 static int imx6q_suspend_finish(unsigned long val)
646 u32 val;
656 val = readl_relaxed(ccm_base + CLPCR);
657 val &= ~BM_CLPCR_LPM;
658 writel_relaxed(val, ccm_base + CLPCR);