Lines Matching refs:pm_config
33 static struct davinci_pm_config pm_config = {
48 if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
51 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
53 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
58 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
60 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
64 val = __raw_readl(pm_config.deepsleep_reg);
66 val |= pm_config.sleepcount;
67 __raw_writel(val, pm_config.deepsleep_reg);
70 davinci_sram_suspend(&pm_config);
72 if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
75 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
77 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
80 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
82 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
88 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
90 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
96 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
99 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
131 pm_config.ddr2_ctlr_base = da8xx_get_mem_ctlr();
132 pm_config.deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
134 pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
135 if (!pm_config.cpupll_reg_base)
138 pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
139 if (!pm_config.ddrpll_reg_base) {
144 pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
145 if (!pm_config.ddrpsc_reg_base) {
165 iounmap(pm_config.ddrpsc_reg_base);
167 iounmap(pm_config.ddrpll_reg_base);
169 iounmap(pm_config.cpupll_reg_base);