Lines Matching refs:write_aux_reg
112 write_aux_reg(ARC_REG_TLBPD1, 0);
115 write_aux_reg(ARC_REG_TLBPD1HI, 0);
117 write_aux_reg(ARC_REG_TLBPD0, 0);
118 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);
140 write_aux_reg(ARC_REG_TLBINDEX, 0xa);
143 write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB);
154 write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid);
156 write_aux_reg(ARC_REG_TLBCOMMAND, TLBProbe);
196 write_aux_reg(ARC_REG_TLBCOMMAND, TLBGetIndex);
199 write_aux_reg(ARC_REG_TLBPD1, pd1);
206 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);
213 write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid | _PAGE_PRESENT);
214 write_aux_reg(ARC_REG_TLBCOMMAND, TLBDeleteEntry);
219 write_aux_reg(ARC_REG_TLBPD0, pd0);
220 write_aux_reg(ARC_REG_TLBPD1, pd1);
223 write_aux_reg(ARC_REG_TLBPD1HI, (u64)pd1 >> 32);
225 write_aux_reg(ARC_REG_TLBCOMMAND, TLBInsertEntry);
244 write_aux_reg(ARC_REG_TLBPD1, 0);
247 write_aux_reg(ARC_REG_TLBPD1HI, 0);
249 write_aux_reg(ARC_REG_TLBPD0, 0);
253 write_aux_reg(ARC_REG_TLBINDEX, entry);
254 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI);
261 write_aux_reg(ARC_REG_TLBPD0, _PAGE_HW_SZ);
264 write_aux_reg(ARC_REG_TLBINDEX, entry);
265 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI);
847 write_aux_reg(ARC_REG_PID, MMU_ENABLE);
852 write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir);
856 write_aux_reg(ARC_REG_TLBPD1HI, 0);
906 write_aux_reg(ARC_REG_TLBINDEX,
908 write_aux_reg(ARC_REG_TLBCOMMAND, TLBRead);
939 write_aux_reg(ARC_REG_TLBINDEX,