Lines Matching refs:UL
9 #define FPCR_DNOD (1UL<<47) /* denorm INV trap disable */
10 #define FPCR_DNZ (1UL<<48) /* denorms to zero */
11 #define FPCR_INVD (1UL<<49) /* invalid op disable (opt.) */
12 #define FPCR_DZED (1UL<<50) /* division by zero disable (opt.) */
13 #define FPCR_OVFD (1UL<<51) /* overflow disable (optional) */
14 #define FPCR_INV (1UL<<52) /* invalid operation */
15 #define FPCR_DZE (1UL<<53) /* division by zero */
16 #define FPCR_OVF (1UL<<54) /* overflow */
17 #define FPCR_UNF (1UL<<55) /* underflow */
18 #define FPCR_INE (1UL<<56) /* inexact */
19 #define FPCR_IOV (1UL<<57) /* integer overflow */
20 #define FPCR_UNDZ (1UL<<60) /* underflow to zero (opt.) */
21 #define FPCR_UNFD (1UL<<61) /* underflow disable (opt.) */
22 #define FPCR_INED (1UL<<62) /* inexact disable (opt.) */
23 #define FPCR_SUM (1UL<<63) /* summary bit */
44 #define IEEE_TRAP_ENABLE_INV (1UL<<1) /* invalid op */
45 #define IEEE_TRAP_ENABLE_DZE (1UL<<2) /* division by zero */
46 #define IEEE_TRAP_ENABLE_OVF (1UL<<3) /* overflow */
47 #define IEEE_TRAP_ENABLE_UNF (1UL<<4) /* underflow */
48 #define IEEE_TRAP_ENABLE_INE (1UL<<5) /* inexact */
49 #define IEEE_TRAP_ENABLE_DNO (1UL<<6) /* denorm */
55 #define IEEE_MAP_DMZ (1UL<<12) /* Map denorm inputs to zero */
56 #define IEEE_MAP_UMZ (1UL<<13) /* Map underflowed outputs to zero */
61 #define IEEE_STATUS_INV (1UL<<17)
62 #define IEEE_STATUS_DZE (1UL<<18)
63 #define IEEE_STATUS_OVF (1UL<<19)
64 #define IEEE_STATUS_UNF (1UL<<20)
65 #define IEEE_STATUS_INE (1UL<<21)
66 #define IEEE_STATUS_DNO (1UL<<22)
76 #define IEEE_CURRENT_RM_MASK (3UL<<IEEE_CURRENT_RM_SHIFT)
80 #define IEEE_INHERIT (1UL<<63) /* inherit on thread create? */