Lines Matching defs:bus
52 * cpu_high_freq, change bus rate to low_rate, otherwise change it to
70 static int rockchip_bus_smc_config(struct rockchip_bus *bus)
72 struct device *dev = bus->dev;
79 ret = of_property_read_u32_index(child, "bus-id", 0,
106 dev_info(dev, "bus smc config error: %x!\n", ret);
114 static int rockchip_bus_set_freq_table(struct rockchip_bus *bus)
116 struct device *dev = bus->dev;
125 bus->max_state = count;
126 bus->freq_table = devm_kcalloc(dev,
127 bus->max_state,
128 sizeof(*bus->freq_table),
130 if (!bus->freq_table) {
131 bus->max_state = 0;
135 for (i = 0, freq = 0; i < bus->max_state; i++, freq++) {
138 devm_kfree(dev, bus->freq_table);
139 bus->max_state = 0;
142 bus->freq_table[i].volt = dev_pm_opp_get_voltage(opp);
143 bus->freq_table[i].freq = freq;
150 static int rockchip_bus_power_control_init(struct rockchip_bus *bus)
152 struct device *dev = bus->dev;
155 bus->clk = devm_clk_get(dev, "bus");
156 if (IS_ERR(bus->clk)) {
157 dev_err(dev, "failed to get bus clock\n");
158 return PTR_ERR(bus->clk);
161 bus->regulator = devm_regulator_get(dev, "bus");
162 if (IS_ERR(bus->regulator)) {
163 dev_err(dev, "failed to get bus regulator\n");
164 return PTR_ERR(bus->regulator);
173 ret = rockchip_bus_set_freq_table(bus);
175 dev_err(dev, "failed to set bus freq table\n");
184 struct rockchip_bus *bus = dev_get_drvdata(dev);
185 unsigned long target_volt = bus->freq_table[bus->max_state - 1].volt;
188 for (i = 0; i < bus->max_state; i++) {
189 if (freq <= bus->freq_table[i].freq) {
190 target_volt = bus->freq_table[i].volt;
195 if (bus->cur_volt != target_volt) {
196 dev_dbg(bus->dev, "target_volt: %lu\n", target_volt);
197 if (regulator_set_voltage(bus->regulator, target_volt,
203 bus->cur_volt = target_volt;
213 struct rockchip_bus *bus = to_rockchip_bus_clk_nb(nb);
216 dev_dbg(bus->dev, "event %lu, old_rate %lu, new_rate: %lu\n",
222 ret = rockchip_bus_clkfreq_target(bus->dev,
227 ret = rockchip_bus_clkfreq_target(bus->dev,
232 ret = rockchip_bus_clkfreq_target(bus->dev,
242 static int rockchip_bus_clkfreq(struct rockchip_bus *bus)
244 struct device *dev = bus->dev;
248 ret = rockchip_bus_power_control_init(bus);
254 init_rate = clk_get_rate(bus->clk);
259 bus->clk_nb.notifier_call = rockchip_bus_clk_notifier;
260 ret = clk_notifier_register(bus->clk, &bus->clk_nb);
272 struct rockchip_bus *bus = dev_get_drvdata(dev);
277 if (!bus->regulator) {
278 dev_dbg(dev, "%luHz -> %luHz\n", bus->cur_rate, target_rate);
279 ret = clk_set_rate(bus->clk, target_rate);
281 dev_err(bus->dev, "failed to set bus rate %lu\n",
284 bus->cur_rate = target_rate;
296 if (bus->cur_rate == target_rate) {
297 if (bus->cur_volt == target_volt)
299 ret = regulator_set_voltage(bus->regulator, target_volt,
306 bus->cur_volt = target_volt;
308 } else if (!bus->cur_volt) {
309 bus->cur_volt = regulator_get_voltage(bus->regulator);
312 if (bus->cur_rate < target_rate) {
313 ret = regulator_set_voltage(bus->regulator, target_volt,
322 ret = clk_set_rate(bus->clk, target_rate);
324 dev_err(dev, "failed to set bus rate %lu\n", target_rate);
328 if (bus->cur_rate > target_rate) {
329 ret = regulator_set_voltage(bus->regulator, target_volt,
338 dev_dbg(dev, "%luHz %luuV -> %luHz %luuV\n", bus->cur_rate,
339 bus->cur_volt, target_rate, target_volt);
340 bus->cur_rate = target_rate;
341 bus->cur_volt = target_volt;
349 struct rockchip_bus *bus = to_rockchip_bus_cpufreq_nb(nb);
356 bus->cpu_freq[id] = freqs->new;
358 if (!bus->cpu_freq[CLUSTER0] || !bus->cpu_freq[CLUSTER1])
363 if ((bus->cpu_freq[CLUSTER0] > bus->cpu_high_freq ||
364 bus->cpu_freq[CLUSTER1] > bus->cpu_high_freq) &&
365 bus->cur_rate != bus->high_rate) {
366 dev_dbg(bus->dev, "cpu%d freq=%d %d, up cci rate to %lu\n",
368 bus->cpu_freq[CLUSTER0],
369 bus->cpu_freq[CLUSTER1],
370 bus->high_rate);
371 rockchip_bus_cpufreq_target(bus->dev, bus->high_rate,
376 if (bus->cpu_freq[CLUSTER0] <= bus->cpu_high_freq &&
377 bus->cpu_freq[CLUSTER1] <= bus->cpu_high_freq &&
378 bus->cur_rate != bus->low_rate) {
379 dev_dbg(bus->dev, "cpu%d freq=%d %d, down cci rate to %lu\n",
381 bus->cpu_freq[CLUSTER0],
382 bus->cpu_freq[CLUSTER1],
383 bus->low_rate);
384 rockchip_bus_cpufreq_target(bus->dev, bus->low_rate,
393 static int rockchip_bus_cpufreq(struct rockchip_bus *bus)
395 struct device *dev = bus->dev;
401 ret = rockchip_bus_power_control_init(bus);
407 bus->clk = devm_clk_get(dev, "bus");
408 if (IS_ERR(bus->clk)) {
409 dev_err(dev, "failed to get bus clock\n");
410 return PTR_ERR(bus->clk);
412 bus->regulator = NULL;
415 ret = of_property_read_u32(np, "cpu-high-freq", &bus->cpu_high_freq);
425 bus->high_rate = freq * 1000;
431 bus->low_rate = freq * 1000;
433 bus->cpufreq_nb.notifier_call = rockchip_bus_cpufreq_notifier;
434 ret = cpufreq_register_notifier(&bus->cpufreq_nb,
445 { .compatible = "rockchip,px30-bus", },
446 { .compatible = "rockchip,rk1808-bus", },
447 { .compatible = "rockchip,rk3288-bus", },
448 { .compatible = "rockchip,rk3368-bus", },
449 { .compatible = "rockchip,rk3399-bus", },
450 { .compatible = "rockchip,rk3568-bus", },
451 { .compatible = "rockchip,rv1126-bus", },
461 struct rockchip_bus *bus;
465 bus = devm_kzalloc(dev, sizeof(*bus), GFP_KERNEL);
466 if (!bus)
468 bus->dev = dev;
469 platform_set_drvdata(pdev, bus);
479 ret = rockchip_bus_smc_config(bus);
481 ret = rockchip_bus_clkfreq(bus);
483 ret = rockchip_bus_cpufreq(bus);
491 .name = "rockchip,bus",