phy-rockchip-inno-usb3.c - OpenGrok cross reference for /device/soc/rockchip/common/vendor/drivers/phy/phy-rockchip-inno-usb3.c

Lines Matching refs:base
127     void __iomem *base;

152 static inline int param_write(void __iomem *base, const struct u3phy_reg *reg, bool desired)

160     ret = regmap_write(base, reg->offset, val);

165 static inline bool param_exped(void __iomem *base, const struct u3phy_reg *reg, unsigned int value)

171     ret = regmap_read(base, reg->offset, &orig);

246                 writel(0x30, u3phy_port->base + 0xd8);

265                 writel(0x20, u3phy_port->base + 0xd8);

748     u3phy_port->base = devm_ioremap_resource(&u3phy_port->phy->dev, &res);

749     if (IS_ERR(u3phy_port->base)) {

751         return PTR_ERR(u3phy_port->base);

938         reg = readl(u3phy_port->base + 0x1a8);

940         writel(reg, u3phy_port->base + 0x1a8);

942         reg = readl(u3phy_port->base + 0x044);

944         writel(reg, u3phy_port->base + 0x044);

946         reg = readl(u3phy_port->base + 0x150);

948         writel(reg, u3phy_port->base + 0x150);

950         reg = readl(u3phy_port->base + 0x080);

952         writel(reg, u3phy_port->base + 0x080);

954         reg = readl(u3phy_port->base + 0x0c0);

957         writel(reg, u3phy_port->base + 0x0c0);

961         reg = readl(u3phy_port->base + 0x1a8);

963         writel(reg, u3phy_port->base + 0x1a8);

965         reg = readl(u3phy_port->base + 0x044);

967         writel(reg, u3phy_port->base + 0x044);

969         reg = readl(u3phy_port->base + 0x150);

971         writel(reg, u3phy_port->base + 0x150);

973         reg = readl(u3phy_port->base + 0x080);

975         writel(reg, u3phy_port->base + 0x080);

977         reg = readl(u3phy_port->base + 0x0c0);

980         writel(reg, u3phy_port->base + 0x0c0);

1010         writel(u3phy->apbcfg.u2_pre_emp, u3phy_port->base + 0x030);

1011         writel(u3phy->apbcfg.u2_pre_emp_sth, u3phy_port->base + 0x040);

1012         writel(u3phy->apbcfg.u2_odt_tuning, u3phy_port->base + 0x11c);

1017             writel(0x64, u3phy_port->base + 0x11c);

1018             writel(0x64, u3phy_port->base + 0x028);

1019             writel(0x01, u3phy_port->base + 0x020);

1020             writel(0x21, u3phy_port->base + 0x030);

1021             writel(0x06, u3phy_port->base + 0x108);

1022             writel(0x00, u3phy_port->base + 0x118);

1025             writel(0x80, u3phy_port->base + 0x10c);

1026             writel(0x01, u3phy_port->base + 0x118);

1027             writel(0x38, u3phy_port->base + 0x11c);

1028             writel(0x83, u3phy_port->base + 0x020);

1029             writel(0x02, u3phy_port->base + 0x108);

1034         writel(0x08, u3phy_port->base + 0x000);

1035         writel(0x0c, u3phy_port->base + 0x120);

1038         writel(0x70, u3phy_port->base + 0x150);

1039         writel(0x12, u3phy_port->base + 0x0c8);

1040         writel(0x05, u3phy_port->base + 0x148);

1041         writel(0x08, u3phy_port->base + 0x068);

1042         writel(0xf0, u3phy_port->base + 0x1c4);

1043         writel(0xff, u3phy_port->base + 0x070);

1044         writel(0x0f, u3phy_port->base + 0x06c);

1045         writel(0xe0, u3phy_port->base + 0x060);

1052         writel(0x08, u3phy_port->base + 0x180);