Lines Matching refs:rate
453 static u32 inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, int rate)
460 tmdsclk = (u32)rate / 0x02;
463 tmdsclk = (u32)rate * 0x05 / 0x08;
466 tmdsclk = (u32)rate * 0x03 / 0x04;
469 tmdsclk = (u32)rate * 0x05 / 0x04;
472 tmdsclk = (u32)rate * 0x03 / 0x02;
475 tmdsclk = (u32)rate * 0x02;
478 tmdsclk = rate;
532 static int inno_hdmi_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate);
652 static long inno_hdmi_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate)
657 u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
660 if (cfg->pixclock == rate) {
693 static int inno_hdmi_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate)
697 u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
699 dev_dbg(inno->dev, "%s rate %lu tmdsclk %u\n", __func__, rate, tmdsclock);
706 if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock) {
712 dev_err(inno->dev, "unsupported rate %lu\n", rate);
720 inno->pixclock = rate;
1167 dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);
1201 dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);