Lines Matching defs:reg
61 static inline void gpio_writel_v2(u32 val, void __iomem *reg)
63 writel((val & 0xffff) | 0xffff0000, reg);
64 writel((val >> 16) | 0xffff0000, reg + 0x4);
67 static inline u32 gpio_readl_v2(void __iomem *reg)
69 return readl(reg + 0x4) << 16 | readl(reg);
74 void __iomem *reg = bank->reg_base + offset;
77 gpio_writel_v2(value, reg);
79 writel(value, reg);
85 void __iomem *reg = bank->reg_base + offset;
89 value = gpio_readl_v2(reg);
91 value = readl(reg);
99 void __iomem *reg = bank->reg_base + offset;
108 writel(data, bit >= 0x10 ? reg + 0x4 : reg);
110 data = readl(reg);
115 writel(data, reg);
121 void __iomem *reg = bank->reg_base + offset;
125 data = readl(bit >= 0x10 ? reg + 0x4 : reg);
128 data = readl(reg);
192 const struct rockchip_gpio_regs *reg = bank->gpio_regs;
218 cur_div_reg = readl(bank->reg_base + reg->dbclk_div_con);
220 writel(div_reg, bank->reg_base + reg->dbclk_div_con);
222 rockchip_gpio_writel_bit(bank, offset, 1, reg->dbclk_div_en);
225 rockchip_gpio_writel_bit(bank, offset, 1, reg->debounce);
228 rockchip_gpio_writel_bit(bank, offset, 0, reg->dbclk_div_en);
231 rockchip_gpio_writel_bit(bank, offset, 0, reg->debounce);
318 const struct rockchip_gpio_regs *reg = bank->gpio_regs;
325 pend = readl_relaxed(bank->reg_base + reg->int_status);
348 data = readl_relaxed(bank->reg_base + reg->ext_port);
352 polarity = readl_relaxed(bank->reg_base + reg->int_polarity);
358 writel(polarity, bank->reg_base + reg->int_polarity);
363 data = readl_relaxed(bank->reg_base + reg->ext_port);