Lines Matching refs:pvtm
36 u32 (*get_value)(struct rockchip_clock_pvtm *pvtm, unsigned int time_us);
37 int (*init_freq)(struct rockchip_clock_pvtm *pvtm);
38 int (*sel_enable)(struct rockchip_clock_pvtm *pvtm);
78 static int rockchip_clock_sel_internal_pvtm(struct rockchip_clock_pvtm *pvtm)
82 ret = regmap_write(pvtm->grf, pvtm->info->sel_con,
83 wr_msk_bit(pvtm->info->sel_value, pvtm->info->sel_shift, pvtm->info->sel_mask));
91 /* get pmu pvtm value */
92 static u32 rockchip_clock_pvtm_get_value(struct rockchip_clock_pvtm *pvtm, u32 time_us)
94 const struct rockchip_clock_pvtm_info *info = pvtm->info;
101 regmap_write(pvtm->grf, info->con + 0x4, clk_cnt);
102 regmap_write(pvtm->grf, info->con, wr_msk_bit(0x3, 0, 0x3));
108 regmap_read(pvtm->grf, info->sta, &sta);
116 regmap_read(pvtm->grf, info->sta + 0x4, &val);
122 regmap_write(pvtm->grf, info->con, wr_msk_bit(0, 0, 0x3));
127 static int rockchip_clock_pvtm_init_freq(struct rockchip_clock_pvtm *pvtm)
134 pvtm_cnt = pvtm->info->get_value(pvtm, time_us);
138 div = DIV_ROUND_UP(0x3e8 * pvtm_cnt, pvtm->rate);
139 if (div > pvtm->info->div_mask) {
141 div = pvtm->info->div_mask;
144 pr_debug("set div %d, rate %luKHZ\n", div, pvtm->rate);
145 ret = regmap_write(pvtm->grf, pvtm->info->con, wr_msk_bit(div, pvtm->info->div_shift, pvtm->info->div_mask));
150 /* pmu pvtm oscilator enable */
151 ret = regmap_write(pvtm->grf, pvtm->info->con, wr_msk_bit(1, 1, 0x1));
156 ret = pvtm->info->sel_enable(pvtm);
165 static int clock_pvtm_regitstor(struct device *dev, struct rockchip_clock_pvtm *pvtm)
171 pvtm->info->init_freq(pvtm);
186 pvtm->clk = devm_clk_register(dev, clk_hw);
187 if (IS_ERR(pvtm->clk)) {
188 return PTR_ERR(pvtm->clk);
191 return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, pvtm->clk);
210 .compatible = "rockchip,rk3368-pvtm-clock",
221 struct rockchip_clock_pvtm *pvtm;
225 pvtm = devm_kzalloc(dev, sizeof(*pvtm), GFP_KERNEL);
226 if (!pvtm) {
235 pvtm->info = (const struct rockchip_clock_pvtm_info *)match->data;
236 if (!pvtm->info) {
244 pvtm->grf = syscon_node_to_regmap(dev->parent->of_node);
245 if (IS_ERR(pvtm->grf)) {
246 return PTR_ERR(pvtm->grf);
249 if (!of_property_read_u32(np, "pvtm-rate", &rate)) {
250 pvtm->rate = rate;
252 pvtm->rate = 0x8000;
255 pvtm->pvtm_clk = devm_clk_get(&pdev->dev, "pvtm_pmu_clk");
256 if (IS_ERR(pvtm->pvtm_clk)) {
257 error = PTR_ERR(pvtm->pvtm_clk);
259 dev_err(&pdev->dev, "failed to get pvtm core clock: %d\n", error);
264 error = clk_prepare_enable(pvtm->pvtm_clk);
270 platform_set_drvdata(pdev, pvtm);
272 error = clock_pvtm_regitstor(&pdev->dev, pvtm);
281 clk_disable_unprepare(pvtm->pvtm_clk);
288 struct rockchip_clock_pvtm *pvtm = platform_get_drvdata(pdev);
292 clk_disable_unprepare(pvtm->pvtm_clk);
300 .name = "rockchip-clcok-pvtm",