Lines Matching refs:name
251 * @fw_name: parent name local to provider registering clk
252 * @name: globally unique parent name (used as a fallback)
258 const char *name;
266 * @name: clock name
277 const char *name;
339 struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev, struct device_node *np, const char *name,
344 struct clk *clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags,
350 * @name: name of this clock
351 * @parent_name: name of clock's parent
355 #define clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate) \
356 __clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (fixed_rate), 0, 0)
361 * @name: name of this clock
366 #define clk_hw_register_fixed_rate_parent_hw(dev, name, parent_hw, flags, fixed_rate) \
367 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (fixed_rate), 0, 0)
372 * @name: name of this clock
377 #define clk_hw_register_fixed_rate_parent_data(dev, name, parent_hw, flags, fixed_rate) \
378 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (fixed_rate), 0, 0)
383 * @name: name of this clock
384 * @parent_name: name of clock's parent
389 #define clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, flags, fixed_rate, fixed_accuracy) \
390 __clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (fixed_rate), \
396 * @name: name of this clock
402 #define clk_hw_register_fixed_rate_with_accuracy_parent_hw(dev, name, parent_hw, flags, fixed_rate, fixed_accuracy) \
403 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw)NULL, NULL, (flags), (fixed_rate), \
409 * @name: name of this clock
410 * @parent_name: name of clock's parent
415 #define clk_hw_register_fixed_rate_with_accuracy_parent_data(dev, name, parent_data, flags, fixed_rate, \
417 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL, (parent_data), NULL, (flags), (fixed_rate), \
463 struct clk_hw *__clk_hw_register_gate(struct device *dev, struct device_node *np, const char *name,
467 struct clk *clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags,
472 * @name: name of this clock
473 * @parent_name: name of this clock's parent
480 #define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, clk_gate_flags, lock) \
481 __clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (bit_idx), \
487 * @name: name of this clock
495 #define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg, bit_idx, clk_gate_flags, lock) \
496 __clk_hw_register_gate((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (bit_idx), (clk_gate_flags), \
502 * @name: name of this clock
510 #define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg, bit_idx, clk_gate_flags, lock) \
511 __clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (bit_idx), \
597 struct clk_hw *__clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name,
602 struct clk *clk_register_divider_table(struct device *dev, const char *name, const char *parent_name,
608 * @name: name of this clock
609 * @parent_name: name of clock's parent
617 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, lock) \
618 clk_register_divider_table((dev), (name), (parent_name), (flags), (reg), (shift), (width), (clk_divider_flags), \
623 * @name: name of this clock
624 * @parent_name: name of clock's parent
632 #define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, lock) \
633 __clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (shift), (width), \
639 * @name: name of this clock
648 #define clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk_divider_flags, lock) \
649 __clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (shift), (width), \
655 * @name: name of this clock
664 #define clk_hw_register_divider_parent_data(dev, name, parent_data, flags, reg, shift, width, clk_divider_flags, lock) \
665 __clk_hw_register_divider((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (shift), (width), \
671 * @name: name of this clock
672 * @parent_name: name of clock's parent
681 #define clk_hw_register_divider_table(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, table, \
683 __clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (shift), (width), \
689 * @name: name of this clock
699 #define clk_hw_register_divider_table_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk_divider_flags, \
701 __clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (shift), (width), \
707 * @name: name of this clock
717 #define clk_hw_register_divider_table_parent_data(dev, name, parent_data, flags, reg, shift, width, clk_divider_flags, \
719 __clk_hw_register_divider((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (shift), (width), \
776 struct clk_hw *__clk_hw_register_mux(struct device *dev, struct device_node *np, const char *name, u8 num_parents,
780 struct clk *clk_register_mux_table(struct device *dev, const char *name, const char *const *parent_names,
784 #define clk_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
785 clk_register_mux_table((dev), (name), (parent_names), (num_parents), (flags), (reg), (shift), BIT((width)) - 1, \
787 #define clk_hw_register_mux_table(dev, name, parent_names, num_parents, flags, reg, shift, mask, clk_mux_flags, table, \
789 __clk_hw_register_mux((dev), NULL, (name), (num_parents), (parent_names), NULL, NULL, (flags), (reg), (shift), \
791 #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
792 __clk_hw_register_mux((dev), NULL, (name), (num_parents), (parent_names), NULL, NULL, (flags), (reg), (shift), \
794 #define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
795 __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, (parent_hws), NULL, (flags), (reg), (shift), \
797 #define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents, flags, reg, shift, width, clk_mux_flags, \
799 __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, (parent_data), (flags), (reg), (shift), \
831 struct clk *clk_register_fixed_factor(struct device *dev, const char *name, const char *parent_name,
834 struct clk_hw *clk_hw_register_fixed_factor(struct device *dev, const char *name, const char *parent_name,
885 struct clk *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name,
888 struct clk_hw *clk_hw_register_fractional_divider(struct device *dev, const char *name, const char *parent_name,
964 struct clk *clk_register_composite(struct device *dev, const char *name, const char *const *parent_names,
968 struct clk *clk_register_composite_pdata(struct device *dev, const char *name,
974 struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name, const char *const *parent_names,
978 struct clk_hw *clk_hw_register_composite_pdata(struct device *dev, const char *name,
1024 struct clk *__clk_lookup(const char *name);
1066 #define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
1072 #define CLK_OF_DECLARE_DRIVER(name, compat, fn) \
1073 static void __init name##_of_clk_init_driver(struct device_node *np) \
1078 OF_DECLARE_1(clk, name, compat, name##_of_clk_init_driver)
1083 .name = (_name), \
1092 .name = (_name), \
1106 .name = (_name), \
1115 .name = (_name), \
1127 .name = (_name), \
1136 .name = (_name), \
1145 .name = (_name), \
1154 .name = (_name), \