Lines Matching refs:flags
13 * flags used across common struct clk. these flags should only affect the
14 * top-level framework. custom flags for dealing with hardware specifics
274 * @flags: framework-level hints and quirks
284 unsigned long flags;
314 * unique flags for that hardware type, a registration function and an
323 * @flags: hardware specific flags
333 unsigned long flags;
341 const struct clk_parent_data *parent_data, unsigned long flags,
344 struct clk *clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags,
352 * @flags: framework-specific flags
355 #define clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate) \
356 __clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (fixed_rate), 0, 0)
363 * @flags: framework-specific flags
366 #define clk_hw_register_fixed_rate_parent_hw(dev, name, parent_hw, flags, fixed_rate) \
367 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (fixed_rate), 0, 0)
374 * @flags: framework-specific flags
377 #define clk_hw_register_fixed_rate_parent_data(dev, name, parent_hw, flags, fixed_rate) \
378 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (fixed_rate), 0, 0)
385 * @flags: framework-specific flags
389 #define clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name, flags, fixed_rate, fixed_accuracy) \
390 __clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (fixed_rate), \
398 * @flags: framework-specific flags
402 #define clk_hw_register_fixed_rate_with_accuracy_parent_hw(dev, name, parent_hw, flags, fixed_rate, fixed_accuracy) \
403 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw)NULL, NULL, (flags), (fixed_rate), \
411 * @flags: framework-specific flags
415 #define clk_hw_register_fixed_rate_with_accuracy_parent_data(dev, name, parent_data, flags, fixed_rate, \
417 __clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL, (parent_data), NULL, (flags), (fixed_rate), \
431 * @flags: hardware-specific flags
452 u8 flags;
465 const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg,
467 struct clk *clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags,
474 * @flags: framework-specific flags for this clock
477 * @clk_gate_flags: gate-specific flags for this clock
480 #define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, clk_gate_flags, lock) \
481 __clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (bit_idx), \
489 * @flags: framework-specific flags for this clock
492 * @clk_gate_flags: gate-specific flags for this clock
495 #define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg, bit_idx, clk_gate_flags, lock) \
496 __clk_hw_register_gate((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (bit_idx), (clk_gate_flags), \
504 * @flags: framework-specific flags for this clock
507 * @clk_gate_flags: gate-specific flags for this clock
510 #define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg, bit_idx, clk_gate_flags, lock) \
511 __clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (bit_idx), \
567 u8 flags;
589 const struct clk_div_table *table, unsigned long flags, unsigned long width);
591 const struct clk_div_table *table, u8 width, unsigned long flags);
593 const struct clk_div_table *table, u8 width, unsigned long flags, unsigned int val);
595 unsigned long flags);
599 const struct clk_parent_data *parent_data, unsigned long flags,
603 unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
610 * @flags: framework-specific flags
614 * @clk_divider_flags: divider-specific flags for this clock
617 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, lock) \
618 clk_register_divider_table((dev), (name), (parent_name), (flags), (reg), (shift), (width), (clk_divider_flags), \
625 * @flags: framework-specific flags
629 * @clk_divider_flags: divider-specific flags for this clock
632 #define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, lock) \
633 __clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (shift), (width), \
641 * @flags: framework-specific flags
645 * @clk_divider_flags: divider-specific flags for this clock
648 #define clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk_divider_flags, lock) \
649 __clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (shift), (width), \
657 * @flags: framework-specific flags
661 * @clk_divider_flags: divider-specific flags for this clock
664 #define clk_hw_register_divider_parent_data(dev, name, parent_data, flags, reg, shift, width, clk_divider_flags, lock) \
665 __clk_hw_register_divider((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (shift), (width), \
673 * @flags: framework-specific flags
677 * @clk_divider_flags: divider-specific flags for this clock
681 #define clk_hw_register_divider_table(dev, name, parent_name, flags, reg, shift, width, clk_divider_flags, table, \
683 __clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, NULL, (flags), (reg), (shift), (width), \
691 * @flags: framework-specific flags
695 * @clk_divider_flags: divider-specific flags for this clock
699 #define clk_hw_register_divider_table_parent_hw(dev, name, parent_hw, flags, reg, shift, width, clk_divider_flags, \
701 __clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw), NULL, (flags), (reg), (shift), (width), \
709 * @flags: framework-specific flags
713 * @clk_divider_flags: divider-specific flags for this clock
717 #define clk_hw_register_divider_table_parent_data(dev, name, parent_data, flags, reg, shift, width, clk_divider_flags, \
719 __clk_hw_register_divider((dev), NULL, (name), NULL, NULL, (parent_data), (flags), (reg), (shift), (width), \
733 * @flags: hardware-specific flags
760 u8 flags;
778 const struct clk_parent_data *parent_data, unsigned long flags, void __iomem *reg,
781 u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
784 #define clk_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
785 clk_register_mux_table((dev), (name), (parent_names), (num_parents), (flags), (reg), (shift), BIT((width)) - 1, \
787 #define clk_hw_register_mux_table(dev, name, parent_names, num_parents, flags, reg, shift, mask, clk_mux_flags, table, \
789 __clk_hw_register_mux((dev), NULL, (name), (num_parents), (parent_names), NULL, NULL, (flags), (reg), (shift), \
791 #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
792 __clk_hw_register_mux((dev), NULL, (name), (num_parents), (parent_names), NULL, NULL, (flags), (reg), (shift), \
794 #define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags, reg, shift, width, clk_mux_flags, lock) \
795 __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, (parent_hws), NULL, (flags), (reg), (shift), \
797 #define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents, flags, reg, shift, width, clk_mux_flags, \
799 __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, (parent_data), (flags), (reg), (shift), \
802 int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, unsigned int val);
803 unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index);
832 unsigned long flags, unsigned int mult, unsigned int div);
835 unsigned long flags, unsigned int mult, unsigned int div);
871 u8 flags;
886 unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift,
889 unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth,
922 u8 flags;
967 const struct clk_ops *gate_ops, unsigned long flags);
972 const struct clk_ops *gate_ops, unsigned long flags);
977 const struct clk_ops *gate_ops, unsigned long flags);
983 unsigned long flags);
1028 int clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, unsigned long flags);
1039 const struct clk_div_table *table, u8 width, unsigned long flags)
1041 return divider_round_rate_parent(hw, clk_hw_get_parent(hw), rate, prate, table, width, flags);
1045 const struct clk_div_table *table, u8 width, unsigned long flags,
1048 return divider_ro_round_rate_parent(hw, clk_hw_get_parent(hw), rate, prate, table, width, flags, val);
1082 .flags = (_flags), \
1091 .flags = (_flags), \
1105 .flags = (_flags), \
1114 .flags = (_flags), \
1126 .flags = (_flags), \
1135 .flags = (_flags), \
1144 .flags = (_flags), \
1153 .flags = (_flags), \
1206 int of_clk_detect_critical(struct device_node *np, int index, unsigned long *flags);
1252 static inline int of_clk_detect_critical(struct device_node *np, int index, unsigned long *flags)