Lines Matching refs:iomux
80 * Encode variants of iomux registers into a type variable
94 .iomux = { \
105 .iomux = { \
116 .iomux = { \
127 .iomux = \
145 .iomux = \
166 .iomux = \
186 .iomux = \
1389 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1394 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
1398 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) {
1400 } else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) {
1407 mux_type = bank->iomux[iomux_num].type;
1408 reg = bank->iomux[iomux_num].offset;
1447 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1452 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
1489 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
1495 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) {
1497 } else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) {
1504 mux_type = bank->iomux[iomux_num].type;
1505 reg = bank->iomux[iomux_num].offset;
3424 /* calculate iomux and drv offsets */
3426 struct rockchip_iomux *iom = &bank->iomux[j];
3434 /* preset iomux offset value, set new start value */
3441 } else { /* set current iomux offset */
3457 dev_dbg(d->dev, "bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n", i, j, iom->offset, drv->offset);
3460 * Increase offset according to iomux width.
3461 * 4bit iomux'es are spread over two registers.