Lines Matching refs:bit
74 * Generate a bitmask for setting a value (v) with a write mask bit in hiword
374 .bit = PINCTRL_ROCKCHIP_ZERO,
376 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_ONE, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
377 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_TWO, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_FOUR, .mask = 0x3},
381 .bit = PINCTRL_ROCKCHIP_SIX,
386 .bit = PINCTRL_ROCKCHIP_EIGHT,
388 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_FIVE, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_TEN, .mask = 0x3},
392 .bit = PINCTRL_ROCKCHIP_TWELVE,
397 .bit = PINCTRL_ROCKCHIP_FOURTEEN,
402 .bit = PINCTRL_ROCKCHIP_ZERO,
404 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_NINE, .reg = 0x41c, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
408 {.num = PINCTRL_ROCKCHIP_ZERO, .pin = 20, .reg = 0x10000, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0xf},
412 .bit = PINCTRL_ROCKCHIP_FOUR,
417 .bit = PINCTRL_ROCKCHIP_EIGHT,
422 .bit = PINCTRL_ROCKCHIP_TWELVE,
427 {.num = PINCTRL_ROCKCHIP_TWO, .pin = 20, .reg = 0xe8, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0x7},
431 .bit = PINCTRL_ROCKCHIP_FOUR,
436 .bit = PINCTRL_ROCKCHIP_EIGHT,
441 .bit = PINCTRL_ROCKCHIP_TWELVE,
446 .bit = PINCTRL_ROCKCHIP_TWELVE,
454 .bit = PINCTRL_ROCKCHIP_TWELVE,
459 .bit = PINCTRL_ROCKCHIP_ZERO,
464 .bit = PINCTRL_ROCKCHIP_FOUR,
469 .bit = PINCTRL_ROCKCHIP_EIGHT,
471 {.num = PINCTRL_ROCKCHIP_ONE, .pin = 20, .reg = 0x30, .bit = PINCTRL_ROCKCHIP_TWELVE, .mask = 0xf},
475 .bit = PINCTRL_ROCKCHIP_ZERO,
480 .bit = PINCTRL_ROCKCHIP_FOUR,
485 .bit = PINCTRL_ROCKCHIP_EIGHT,
490 .bit = PINCTRL_ROCKCHIP_EIGHT,
495 .bit = PINCTRL_ROCKCHIP_TWELVE,
497 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_TWO, .reg = 0x608, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0x7},
501 .bit = PINCTRL_ROCKCHIP_FOUR,
506 .bit = PINCTRL_ROCKCHIP_EIGHT,
511 .bit = PINCTRL_ROCKCHIP_ZERO,
516 .bit = PINCTRL_ROCKCHIP_FOUR,
524 .bit = PINCTRL_ROCKCHIP_ZERO,
526 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_NINE, .reg = 0x24, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
527 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_TEN, .reg = 0x24, .bit = PINCTRL_ROCKCHIP_FOUR, .mask = 0x3},
531 .bit = PINCTRL_ROCKCHIP_SIX,
536 .bit = PINCTRL_ROCKCHIP_EIGHT,
541 .bit = PINCTRL_ROCKCHIP_TEN,
546 .bit = PINCTRL_ROCKCHIP_TWELVE,
551 .bit = PINCTRL_ROCKCHIP_ZERO,
556 .bit = PINCTRL_ROCKCHIP_FOURTEEN,
769 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, int *reg, u8 *bit, int *mask)
789 *bit = data->bit;
1383 u8 bit;
1413 bit = (pin % PINCTRL_ROCKCHIP_FOUR) * PINCTRL_ROCKCHIP_FOUR;
1419 bit = (pin % PINCTRL_ROCKCHIP_EIGHT % PINCTRL_ROCKCHIP_FIVE) * PINCTRL_ROCKCHIP_THREE;
1422 bit = (pin % PINCTRL_ROCKCHIP_EIGHT) * 0x2;
1427 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1435 return ((val >> bit) & mask);
1465 * The register is divided into the upper and lower 16 bit. When changing
1467 * it seems the changed bits are marked in the upper 16 bit, while the
1468 * changed value gets set in the same offset in the lower 16 bit.
1469 * All pin settings seem to be 2 bit wide in both the upper and lower
1481 u8 bit;
1510 bit = (pin % PINCTRL_ROCKCHIP_FOUR) * PINCTRL_ROCKCHIP_FOUR;
1516 bit = (pin % PINCTRL_ROCKCHIP_EIGHT % PINCTRL_ROCKCHIP_FIVE) * PINCTRL_ROCKCHIP_THREE;
1519 bit = (pin % PINCTRL_ROCKCHIP_EIGHT) * 0x2;
1524 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1558 data &= ~(mask << bit);
1559 data |= (mux & mask) << bit;
1562 data = (mask << (bit + PINCTRL_ROCKCHIP_SIXTEEN));
1564 data |= (mux & mask) << bit;
1578 u8 *bit)
1596 *bit = (pin_num % PX30_PULL_PINS_PER_REG);
1597 *bit *= PX30_PULL_BITS_PER_PIN;
1607 u8 *bit)
1625 *bit = (pin_num % PX30_DRV_PINS_PER_REG);
1626 *bit *= PX30_DRV_BITS_PER_PIN;
1636 u8 *bit)
1653 *bit = pin_num % pins_per_reg;
1665 u8 *bit)
1682 *bit = (pin_num % RV1108_PULL_PINS_PER_REG);
1683 *bit *= RV1108_PULL_BITS_PER_PIN;
1693 u8 *bit)
1711 *bit = pin_num % RV1108_DRV_PINS_PER_REG;
1712 *bit *= RV1108_DRV_BITS_PER_PIN;
1722 int *reg, u8 *bit)
1738 *bit = pin_num % pins_per_reg;
1751 u8 *bit)
1762 *bit = pin_num % RV1126_PULL_PINS_PER_REG;
1763 *bit *= RV1126_PULL_BITS_PER_PIN;
1775 *bit = (pin_num % RV1126_PULL_PINS_PER_REG);
1776 *bit *= RV1126_PULL_BITS_PER_PIN;
1786 u8 *bit)
1798 *bit = pin_num % RV1126_DRV_PINS_PER_REG;
1799 *bit *= RV1126_DRV_BITS_PER_PIN;
1811 *bit = pin_num % RV1126_DRV_PINS_PER_REG;
1812 *bit *= RV1126_DRV_BITS_PER_PIN;
1822 int *reg, u8 *bit)
1833 *bit = pin_num % RV1126_SCHMITT_PINS_PER_GRF_REG;
1846 *bit = pin_num % pins_per_reg;
1856 int *reg, u8 *bit)
1865 *bit = pin_num % RK3308_SCHMITT_PINS_PER_REG;
1877 u8 *bit)
1891 *bit = (pin_num % RK1808_PULL_PINS_PER_REG);
1892 *bit *= RK1808_PULL_BITS_PER_PIN;
1902 u8 *bit)
1916 *bit = pin_num % RK1808_DRV_PINS_PER_REG;
1917 *bit *= RK1808_DRV_BITS_PER_PIN;
1926 int *reg, u8 *bit)
1939 *bit = pin_num % RK1808_SR_PINS_PER_REG;
1950 int *reg, u8 *bit)
1963 *bit = pin_num % RK1808_SCHMITT_PINS_PER_REG;
1973 u8 *bit)
1982 *bit = pin_num % RK2928_PULL_PINS_PER_REG;
1988 u8 *bit)
1997 *bit = pin_num % RK2928_PULL_PINS_PER_REG;
2007 u8 *bit)
2016 *bit = pin_num % RK3188_PULL_PINS_PER_REG;
2017 *bit *= RK3188_PULL_BITS_PER_PIN;
2032 *bit = PINCTRL_ROCKCHIP_SEVEN - (pin_num % RK3188_PULL_PINS_PER_REG);
2033 *bit *= RK3188_PULL_BITS_PER_PIN;
2039 u8 *bit)
2049 *bit = pin_num % RK3188_PULL_PINS_PER_REG;
2050 *bit *= RK3188_PULL_BITS_PER_PIN;
2060 *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
2061 *bit *= RK3188_PULL_BITS_PER_PIN;
2072 u8 *bit)
2082 *bit = pin_num % RK3288_DRV_PINS_PER_REG;
2083 *bit *= RK3288_DRV_BITS_PER_PIN;
2093 *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
2094 *bit *= RK3288_DRV_BITS_PER_PIN;
2101 u8 *bit)
2110 *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
2111 *bit *= RK3188_PULL_BITS_PER_PIN;
2117 u8 *bit)
2126 *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
2127 *bit *= RK3288_DRV_BITS_PER_PIN;
2133 u8 *bit)
2142 *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
2143 *bit *= RK3188_PULL_BITS_PER_PIN;
2149 u8 *bit)
2158 *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
2159 *bit *= RK3288_DRV_BITS_PER_PIN;
2166 u8 *bit)
2176 *bit = pin_num % RK3188_PULL_PINS_PER_REG;
2177 *bit *= RK3188_PULL_BITS_PER_PIN;
2187 *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
2188 *bit *= RK3188_PULL_BITS_PER_PIN;
2196 u8 *bit)
2206 *bit = pin_num % RK3288_DRV_PINS_PER_REG;
2207 *bit *= RK3288_DRV_BITS_PER_PIN;
2217 *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
2218 *bit *= RK3288_DRV_BITS_PER_PIN;
2227 u8 *bit)
2239 *bit = pin_num % RK3188_PULL_PINS_PER_REG;
2240 *bit *= RK3188_PULL_BITS_PER_PIN;
2250 *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
2251 *bit *= RK3188_PULL_BITS_PER_PIN;
2256 u8 *bit)
2271 *bit = (pin_num % 0x8) * PINCTRL_ROCKCHIP_THREE;
2273 *bit = (pin_num % 0x8) * 0x2;
2283 int *reg, u8 *bit)
2296 *bit = pin_num % RK3568_SR_PINS_PER_REG;
2308 u8 *bit)
2318 *bit = pin_num % RK3568_PULL_PINS_PER_REG;
2319 *bit *= RK3568_PULL_BITS_PER_PIN;
2326 *bit = (pin_num % RK3568_PULL_PINS_PER_REG);
2327 *bit *= RK3568_PULL_BITS_PER_PIN;
2338 u8 *bit)
2348 *bit = pin_num % RK3568_DRV_PINS_PER_REG;
2349 *bit *= RK3568_DRV_BITS_PER_PIN;
2356 *bit = (pin_num % RK3568_DRV_PINS_PER_REG);
2357 *bit *= RK3568_DRV_BITS_PER_PIN;
2367 *bit -= RK3568_DRV_BITS_PER_PIN;
2388 u8 bit;
2391 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
2397 switch (bit) {
2417 * the bit data[15] contains bit 0 of the value
2429 bit -= PINCTRL_ROCKCHIP_SIXTEEN;
2432 dev_err(info->dev, "unsupported bit: %d for pinctrl drive type: %d\n", bit, drv_type);
2452 data >>= bit;
2465 u8 bit;
2470 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
2501 switch (bit) {
2508 * over 2 registers, the bit data[15] contains bit 0
2530 bit -= PINCTRL_ROCKCHIP_SIXTEEN;
2533 dev_err(info->dev, "unsupported bit: %d for pinctrl drive type: %d\n", bit, drv_type);
2549 data = ((PINCTRL_ROCKCHIP_ONE << rmask_bits) - PINCTRL_ROCKCHIP_ONE) << (bit + PINCTRL_ROCKCHIP_SIXTEEN);
2551 data |= (ret << bit);
2599 u8 bit;
2607 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
2617 return !(data & BIT(bit)) ? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT : PIN_CONFIG_BIAS_DISABLE;
2629 data >>= bit;
2645 u8 bit;
2655 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
2660 data = BIT(bit + PINCTRL_ROCKCHIP_SIXTEEN);
2662 data |= BIT(bit);
2701 data = ((1 << RK3188_PULL_BITS_PER_PIN) - PINCTRL_ROCKCHIP_ONE) << (bit + PINCTRL_ROCKCHIP_SIXTEEN);
2703 data |= (ret << bit);
2721 int *reg, u8 *bit)
2730 *bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;
2742 int *reg, u8 *bit)
2756 *bit = pin_num % RK3568_SCHMITT_PINS_PER_REG;
2757 *bit *= RK3568_SCHMITT_BITS_PER_PIN;
2768 u8 bit;
2771 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
2781 data >>= bit;
2798 u8 bit;
2803 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
2812 << (bit + PINCTRL_ROCKCHIP_SIXTEEN);
2814 data |= ((enable ? 0x2 : 0x1) << bit);
2817 data = BIT(bit + PINCTRL_ROCKCHIP_SIXTEEN) | (enable << bit);
2818 rmask = BIT(bit + PINCTRL_ROCKCHIP_SIXTEEN) | BIT(bit);
2832 int *reg, u8 *bit)
2848 *bit = pin_num % pins_per_reg;
2859 u8 bit;
2862 ret = ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit);
2872 data >>= bit;
2882 u8 bit;
2887 ret = ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit);
2893 data = BIT(bit + PINCTRL_ROCKCHIP_SIXTEEN) | (speed << bit);
2894 rmask = BIT(bit + PINCTRL_ROCKCHIP_SIXTEEN) | BIT(bit);
3461 * 4bit iomux'es are spread over two registers.
3473 * 3bit drive-strenth'es are spread over two registers.