Lines Matching defs:pins
91 #define PIN_BANK(id, pins, label) \
93 .bank_num = (id), .nr_pins = (pins), .name = (label), \
102 #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \
104 .bank_num = (id), .nr_pins = (pins), .name = (label), \
113 #define PIN_BANK_IOMUX_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2, iom3, offset0, offset1, offset2, offset3) \
115 .bank_num = (id), .nr_pins = (pins), .name = (label), \
124 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
126 .bank_num = (id), .nr_pins = (pins), .name = (label), \
142 #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1, drv2, drv3, pull0, pull1, pull2, pull3) \
144 .bank_num = (id), .nr_pins = (pins), .name = (label), \
162 #define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2, iom3, drv0, drv1, drv2, drv3, offset0, \
165 .bank_num = (id), .nr_pins = (pins), .name = (label), \
181 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins, label, iom0, iom1, iom2, iom3, drv0, drv1, drv2, \
185 .bank_num = (id), .nr_pins = (pins), .name = (label), \
282 static int rockchip_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins,
291 *pins = info->groups[selector].pins;
309 * config maps for pins
342 new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->pins[i]);
872 BIT(PINCTRL_ROCKCHIP_SIXTEEN + PINCTRL_ROCKCHIP_ELEVEN)), /* non-iomuxed emmc/flash pins on flash-dqs */
875 BIT(PINCTRL_ROCKCHIP_ELEVEN)), /* non-iomuxed emmc/flash pins on emmc-clk */
1582 /* The first 32 pins of the first bank are located in PMU */
1611 /* The first 32 pins of the first bank are located in PMU */
1669 /* The first 24 pins of the first bank are located in PMU */
1697 /* The first 24 pins of the first bank are located in PMU */
1755 /* The first 24 pins of the first bank are located in PMU */
1790 /* The first 24 pins of the first bank are located in PMU */
2011 /* The first 12 pins of the first bank are located elsewhere */
2043 /* The first 24 pins of the first bank are located in PMU */
2076 /* The first 24 pins of the first bank are located in PMU */
2170 /* The first 32 pins of the first bank are located in PMU */
2200 /* The first 32 pins of the first bank are located in PMU */
2231 /* The bank0:16 and bank1:32 pins are located in PMU */
2261 /* The bank0:16 and bank1:32 pins are located in PMU */
2342 /* The first 32 pins of the first bank are located in PMU */
2931 const unsigned int *pins = info->groups[group].pins;
2943 bank = pin_to_bank(info, pins[cnt]);
2944 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, data[cnt].func);
2953 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
3223 * the binding format is rockchip,pins = <bank pin mux CONFIG>,
3224 * do sanity check and calculate pins number
3226 list = of_get_property(np, "rockchip,pins", &size);
3230 dev_err(info->dev, "wrong pins number or pins and configs should be by 4\n");
3236 grp->pins = devm_kcalloc(info->dev, grp->npins, sizeof(unsigned int), GFP_KERNEL);
3238 if (!grp->pins || !grp->data) {
3252 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++);
3370 ctrldesc->pins = pindesc;