Lines Matching defs:pin
205 .bank_num = (ID), .pin = (PIN), .func = (FUNC), .route_offset = (REG), .route_val = (VAL), \
236 * given a pin number that is local to a pin controller, find out the pin bank
237 * and the register base of the pin bank.
239 static struct rockchip_pin_bank *pin_to_bank(struct rockchip_pinctrl *info, unsigned pin)
243 while (pin >= (b->pin_base + b->nr_pins)) {
372 .pin = PINCTRL_ROCKCHIP_ZERO,
376 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_ONE, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
377 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_TWO, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_FOUR, .mask = 0x3},
379 .pin = PINCTRL_ROCKCHIP_THREE,
384 .pin = PINCTRL_ROCKCHIP_FOUR,
388 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_FIVE, .reg = 0x418, .bit = PINCTRL_ROCKCHIP_TEN, .mask = 0x3},
390 .pin = PINCTRL_ROCKCHIP_SIX,
395 .pin = PINCTRL_ROCKCHIP_SEVEN,
400 .pin = PINCTRL_ROCKCHIP_EIGHT,
404 {.num = PINCTRL_ROCKCHIP_ONE, .pin = PINCTRL_ROCKCHIP_NINE, .reg = 0x41c, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
408 {.num = PINCTRL_ROCKCHIP_ZERO, .pin = 20, .reg = 0x10000, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0xf},
410 .pin = PINCTRL_ROCKCHIP_TWENTYONE,
415 .pin = PINCTRL_ROCKCHIP_TWENTYTWO,
420 .pin = PINCTRL_ROCKCHIP_TWENTYTHREE,
427 {.num = PINCTRL_ROCKCHIP_TWO, .pin = 20, .reg = 0xe8, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0x7},
429 .pin = PINCTRL_ROCKCHIP_TWENTYONE,
434 .pin = PINCTRL_ROCKCHIP_TWENTYTWO,
439 .pin = PINCTRL_ROCKCHIP_TWENTYTHREE,
444 .pin = PINCTRL_ROCKCHIP_TWENTYFOUR,
452 .pin = PINCTRL_ROCKCHIP_FOURTEEN,
457 .pin = PINCTRL_ROCKCHIP_FIFTEEN,
462 .pin = PINCTRL_ROCKCHIP_EIGHTEEN,
467 .pin = PINCTRL_ROCKCHIP_NINTEEN,
471 {.num = PINCTRL_ROCKCHIP_ONE, .pin = 20, .reg = 0x30, .bit = PINCTRL_ROCKCHIP_TWELVE, .mask = 0xf},
473 .pin = PINCTRL_ROCKCHIP_TWENTYONE,
478 .pin = PINCTRL_ROCKCHIP_TWENTYTWO,
483 .pin = PINCTRL_ROCKCHIP_TWENTYTHREE,
488 .pin = PINCTRL_ROCKCHIP_TWELVE,
493 .pin = PINCTRL_ROCKCHIP_THIRTEEN,
497 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_TWO, .reg = 0x608, .bit = PINCTRL_ROCKCHIP_ZERO, .mask = 0x7},
499 .pin = PINCTRL_ROCKCHIP_THREE,
504 .pin = PINCTRL_ROCKCHIP_SIXTEEN,
509 .pin = PINCTRL_ROCKCHIP_TEN,
514 .pin = PINCTRL_ROCKCHIP_ELEVEN,
522 .pin = PINCTRL_ROCKCHIP_EIGHT,
526 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_NINE, .reg = 0x24, .bit = PINCTRL_ROCKCHIP_TWO, .mask = 0x3},
527 {.num = PINCTRL_ROCKCHIP_TWO, .pin = PINCTRL_ROCKCHIP_TEN, .reg = 0x24, .bit = PINCTRL_ROCKCHIP_FOUR, .mask = 0x3},
529 .pin = PINCTRL_ROCKCHIP_ELEVEN,
534 .pin = PINCTRL_ROCKCHIP_TWELVE,
539 .pin = PINCTRL_ROCKCHIP_THIRTEEN,
544 .pin = PINCTRL_ROCKCHIP_FOURTEEN,
549 .pin = PINCTRL_ROCKCHIP_FIFTEEN,
554 .pin = PINCTRL_ROCKCHIP_TWENTYTHREE,
769 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, int *reg, u8 *bit, int *mask)
778 if (data->num == bank->bank_num && data->pin == pin) {
1351 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, int mux, u32 *loc, u32 *reg, u32 *value)
1360 if ((data->bank_num == bank->bank_num) && (data->pin == pin) && (data->func == mux)) {
1376 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
1379 int iomux_num = (pin / PINCTRL_ROCKCHIP_EIGHT);
1390 dev_err(info->dev, "pin %d is unrouted\n", pin);
1401 regmap = (pin % PINCTRL_ROCKCHIP_EIGHT < PINCTRL_ROCKCHIP_FOUR) ? info->regmap_pmu : info->regmap_base;
1410 if ((pin % PINCTRL_ROCKCHIP_EIGHT) >= PINCTRL_ROCKCHIP_FOUR) {
1413 bit = (pin % PINCTRL_ROCKCHIP_FOUR) * PINCTRL_ROCKCHIP_FOUR;
1416 if ((pin % PINCTRL_ROCKCHIP_EIGHT) >= PINCTRL_ROCKCHIP_FIVE) {
1419 bit = (pin % PINCTRL_ROCKCHIP_EIGHT % PINCTRL_ROCKCHIP_FIVE) * PINCTRL_ROCKCHIP_THREE;
1422 bit = (pin % PINCTRL_ROCKCHIP_EIGHT) * 0x2;
1426 if (bank->recalced_mask & BIT(pin)) {
1427 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1438 static int rockchip_verify_mux(struct rockchip_pin_bank *bank, int pin, int mux)
1441 int iomux_num = (pin / PINCTRL_ROCKCHIP_EIGHT);
1448 dev_err(info->dev, "pin %d is unrouted\n", pin);
1454 dev_err(info->dev, "pin %d only supports a gpio mux\n", pin);
1463 * Set a new mux function for a pin.
1469 * All pin settings seem to be 2 bit wide in both the upper and lower
1471 * @bank: pin bank to change
1472 * @pin: pin to change
1475 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
1478 int iomux_num = (pin / PINCTRL_ROCKCHIP_EIGHT);
1484 ret = rockchip_verify_mux(bank, pin, mux);
1493 dev_dbg(info->dev, "setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
1498 regmap = (pin % PINCTRL_ROCKCHIP_EIGHT < PINCTRL_ROCKCHIP_FOUR) ? info->regmap_pmu : info->regmap_base;
1507 if ((pin % PINCTRL_ROCKCHIP_EIGHT) >= PINCTRL_ROCKCHIP_FOUR) {
1510 bit = (pin % PINCTRL_ROCKCHIP_FOUR) * PINCTRL_ROCKCHIP_FOUR;
1513 if ((pin % PINCTRL_ROCKCHIP_EIGHT) >= PINCTRL_ROCKCHIP_FIVE) {
1516 bit = (pin % PINCTRL_ROCKCHIP_EIGHT % PINCTRL_ROCKCHIP_FIVE) * PINCTRL_ROCKCHIP_THREE;
1519 bit = (pin % PINCTRL_ROCKCHIP_EIGHT) * 0x2;
1523 if (bank->recalced_mask & BIT(pin)) {
1524 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1531 if (bank->route_mask & BIT(pin)) {
1532 if (rockchip_get_mux_route(bank, pin, mux, &route_location, &route_reg, &route_val)) {
2029 * with the lowest pin being in bits 15:14 and the highest
2030 * pin in bits 1:0
2939 * for each pin in the pin group selected, program the corresponding
2940 * pin function number in the config register.
2951 /* revert the already done pin settings */
2997 /* set the pin config settings for a specified pin */
2998 static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs,
3002 struct rockchip_pin_bank *bank = pin_to_bank(info, pin);
3015 rc = rockchip_set_pull(bank, pin - bank->pin_base, param);
3032 rc = rockchip_set_pull(bank, pin - bank->pin_base, param);
3038 rc = rockchip_get_mux(bank, pin - bank->pin_base);
3040 dev_err(info->dev, "pin-%d has been mux to func%d\n", pin, rc);
3044 rc = gpio->direction_output(gpio, pin - bank->pin_base, arg);
3050 /* rk3288 is the first with per-pin drive-strength */
3055 rc = rockchip_set_drive_perpin(bank, pin - bank->pin_base, arg);
3065 rc = rockchip_set_schmitt(bank, pin - bank->pin_base, arg);
3075 rc = rockchip_set_slew_rate(bank, pin - bank->pin_base, arg);
3088 /* get the pin config settings for a specified pin */
3089 static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config)
3092 struct rockchip_pin_bank *bank = pin_to_bank(info, pin);
3100 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) {
3114 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) {
3121 rc = rockchip_get_mux(bank, pin - bank->pin_base);
3123 dev_err(info->dev, "pin-%d has been mux to func%d\n", pin, rc);
3127 rc = gpio->get(gpio, pin - bank->pin_base);
3135 /* rk3288 is the first with per-pin drive-strength */
3140 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base);
3152 rc = rockchip_get_schmitt(bank, pin - bank->pin_base);
3164 rc = rockchip_get_slew_rate(bank, pin - bank->pin_base);
3223 * the binding format is rockchip,pins = <bank pin mux CONFIG>,
3356 int pin, bank, ret;
3376 for (pin = 0; pin < pin_bank->nr_pins; pin++, k++) {
3378 pdesc->name = kasprintf(GFP_KERNEL, "%s-%d", pin_bank->name, pin);
3492 int pin = 0;
3495 pin = ctrl->iomux_recalced[j].pin;
3496 bank->recalced_mask |= BIT(pin);
3502 int pin = 0;
3505 pin = ctrl->iomux_routes[j].pin;
3506 bank->route_mask |= BIT(pin);