Lines Matching defs:otp

70     "otp",

79 static int rockchip_otp_reset(struct rockchip_otp *otp)

83     ret = reset_control_assert(otp->rst);

85         dev_err(otp->dev, "failed to assert otp phy %d\n", ret);

91     ret = reset_control_deassert(otp->rst);

93         dev_err(otp->dev, "failed to deassert otp phy %d\n", ret);

100 static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag)

105     ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status, (status & flag), 1, OTPC_TIMEOUT);

111     writel(flag, otp->base + OTPC_INT_STATUS);

116 static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable)

120     writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT), otp->base + OTPC_SBPI_CTRL);

122     writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE);

123     writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC, otp->base + OTPC_SBPI_CMD0_OFFSET);

125         writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);

127         writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);

130     writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);

132     ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);

134         dev_err(otp->dev, "timeout during ecc_enable\n");

142     struct rockchip_otp *otp = context;

146     ret = clk_bulk_prepare_enable(otp->num_clks, otp->clks);

148         dev_err(otp->dev, "failed to prepare/enable clks\n");

152     ret = rockchip_otp_reset(otp);

154         dev_err(otp->dev, "failed to reset otp phy\n");

158     ret = rockchip_otp_ecc_enable(otp, false);

160         dev_err(otp->dev, "rockchip_otp_ecc_enable err\n");

164     writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);

167         writel(offset++ | OTPC_USER_ADDR_MASK, otp->base + OTPC_USER_ADDR);

168         writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, otp->base + OTPC_USER_ENABLE);

169         ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);

171             dev_err(otp->dev, "timeout during read setup\n");

174         *buf++ = readb(otp->base + OTPC_USER_Q);

178     writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);

180     clk_bulk_disable_unprepare(otp->num_clks, otp->clks);

186     .name = "rockchip-otp",

200         .compatible = "rockchip,px30-otp",

204         .compatible = "rockchip,rk3308-otp",

214     struct rockchip_otp *otp;

225     otp = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_otp), GFP_KERNEL);

226     if (!otp) {

230     otp->dev = dev;

231     otp->base = devm_platform_ioremap_resource(pdev, 0);

232     if (IS_ERR(otp->base)) {

233         return PTR_ERR(otp->base);

236     otp->num_clks = ARRAY_SIZE(rockchip_otp_clocks);

237     otp->clks = devm_kcalloc(dev, otp->num_clks, sizeof(*otp->clks), GFP_KERNEL);

238     if (!otp->clks) {

242     for (i = 0; i < otp->num_clks; ++i) {

243         otp->clks[i].id = rockchip_otp_clocks[i];

246     ret = devm_clk_bulk_get(dev, otp->num_clks, otp->clks);

251     otp->rst = devm_reset_control_get(dev, "phy");

252     if (IS_ERR(otp->rst)) {

253         return PTR_ERR(otp->rst);

257     otp_config.priv = otp;

268             .name = "rockchip-otp",

279         pr_err("failed to register otp driver\n");