Lines Matching refs:value
34 static uint32_t HiSpiRead(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t *value)
57 *value = readConfig.bits.spiReadData;
61 static uint32_t HiRtcSpiRead(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t *value)
65 ret = HiSpiRead(rtcInfo, regAdd, value);
70 static uint32_t HiSpiWrite(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t value)
78 writeConfig.bits.spiWriteData = value;
97 static uint32_t HiRtcSpiWrite(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t value)
101 ret = HiSpiWrite(rtcInfo, regAdd, value);
160 uint8_t value = 0;
162 ret = HiRtcSpiRead(rtcInfo, RTC_INT_RAW, &value);
168 if (value & RTC_INT_RAW_MASK) {
172 ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
177 if (value & RTC_LOCK_BYPASS_MASK) {
178 ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (~(RTC_LOCK_BYPASS_MASK)) & value);
184 ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
189 ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (value | RTC_LOCK_MASK));
201 uint8_t value;
218 ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
221 } while (((ret != HDF_SUCCESS) || ((value & RTC_LOCK_MASK) == RTC_LOCK_MASK)) && (cnt != 0));
223 if ((ret == HDF_SUCCESS) && ((value & RTC_LOCK_MASK) == RTC_LOCK_MASK)) {
284 uint8_t value = 0;
306 ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (value | RTC_LOAD_MASK));
313 ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
316 } while (((ret != HDF_SUCCESS) || ((value & RTC_LOAD_MASK) == RTC_LOAD_MASK)) && (cnt != 0));
320 if ((ret == HDF_SUCCESS) && ((value & RTC_LOAD_MASK) == RTC_LOAD_MASK)) {
321 HDF_LOGE("HiRtcWriteTime: fail!ret[%u], value[%hhu]", ret, value);
401 uint8_t value = 0;
415 ret = HiRtcSpiRead(rtcInfo, RTC_MSC, &value);
421 ret = HiRtcSpiWrite(rtcInfo, RTC_MSC, (value | RTC_MSC_TIME_MASK));
423 ret = HiRtcSpiWrite(rtcInfo, RTC_MSC, (value & (~RTC_MSC_TIME_MASK)));
435 uint16_t value;
452 value = ((highFreq & 0x0f) << SHIFT_BYTE) + lowFreq; /* 8:[12:8] for freq_h bit */
453 *freq = FREQ_DIFF + (value * FREQ_UNIT) / FREQ_COEFFICIENT; /* freq convert: 3270000+(freq*10000)/3052 */
514 static int32_t HiReadReg(struct RtcHost *host, uint8_t usrDefIndex, uint8_t *value)
518 if (host == NULL || host->data == NULL || value == NULL) {
529 return HiRtcSpiRead(rtcInfo, g_usrRegAddr[usrDefIndex], value);
532 static int32_t HiWriteReg(struct RtcHost *host, uint8_t usrDefIndex, uint8_t value)
547 return HiRtcSpiWrite(rtcInfo, g_usrRegAddr[usrDefIndex], value);
567 uint32_t value;
577 ret = drsOps->GetUint32(node, "anaCtrlAddr", &value, 0);
582 rtcInfo->anaCtrlAddr = (uint8_t)value;
586 ret = drsOps->GetUint32(node, "lock0Addr", &value, 0);
590 rtcInfo->lockAddr.lock0Addr = (uint8_t)value;
591 ret = drsOps->GetUint32(node, "lock1Addr", &value, 0);
595 rtcInfo->lockAddr.lock1Addr = (uint8_t)value;
596 ret = drsOps->GetUint32(node, "lock2Addr", &value, 0);
600 rtcInfo->lockAddr.lock2Addr = (uint8_t)value;
601 ret = drsOps->GetUint32(node, "lock3Addr", &value, 0);
605 rtcInfo->lockAddr.lock3Addr = (uint8_t)value;
613 uint32_t value;
631 ret = drsOps->GetUint32(node, "regAddrLength", &value, 0);
636 rtcInfo->regAddrLength = (uint16_t)value;
638 ret = drsOps->GetUint32(node, "irq", &value, 0);
643 rtcInfo->irq = (uint8_t)value;
657 uint8_t value = 0;
667 ret = HiSpiRead(rtcInfo, RTC_INT, &value);
680 if (value & RTC_INT_MASK) {
684 if (value & RTC_INT_UV_MASK) {
685 HiSpiRead(rtcInfo, RTC_MSC, &value);
686 HiSpiWrite(rtcInfo, RTC_MSC, value & (~RTC_INT_UV_MASK)); /* close low voltage int */
760 uint8_t value = 0;
762 /* clk div value is (apb_clk/spi_clk)/2-1, for asic, apb clk(100MHz), spi_clk(10MHz), so value is 0x4 */
774 if (HiRtcSpiRead(rtcInfo, RTC_INT_RAW, &value) != 0) {
779 if (value & RTC_INT_RAW_MASK) {