Lines Matching refs:rtcInfo

34 static uint32_t HiSpiRead(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t *value)
45     OSAL_WRITEL(writeConfig.data, RTC_SPI_RW((uintptr_t)rtcInfo->remapBaseAddr));
48         readConfig.data = OSAL_READL(RTC_SPI_RW((uintptr_t)rtcInfo->remapBaseAddr));
61 static uint32_t HiRtcSpiRead(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t *value)
64     OsalMutexLock(&rtcInfo->mutex);
65     ret = HiSpiRead(rtcInfo, regAdd, value);
66     OsalMutexUnlock(&rtcInfo->mutex);
70 static uint32_t HiSpiWrite(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t value)
82     OSAL_WRITEL(writeConfig.data, RTC_SPI_RW((uintptr_t)rtcInfo->remapBaseAddr));
85         readConfig.data = OSAL_READL(RTC_SPI_RW((uintptr_t)rtcInfo->remapBaseAddr));
97 static uint32_t HiRtcSpiWrite(struct RtcConfigInfo *rtcInfo, uint8_t regAdd, uint8_t value)
100     OsalMutexLock(&rtcInfo->mutex);
101     ret = HiSpiWrite(rtcInfo, regAdd, value);
102     OsalMutexUnlock(&rtcInfo->mutex);
106 static int32_t HiRtcReadTimeData(struct RtcConfigInfo *rtcInfo, struct RtcTimeReg *regAddr, struct RtcTime *time)
123     ret = HiRtcSpiRead(rtcInfo, regAddr->millisecondAddr, &millisecond);
128     ret = HiRtcSpiRead(rtcInfo, regAddr->secondAddr, &second);
132     ret = HiRtcSpiRead(rtcInfo, regAddr->minuteAddr, &minute);
136     ret = HiRtcSpiRead(rtcInfo, regAddr->hourAddr, &hour);
140     ret = HiRtcSpiRead(rtcInfo, regAddr->dayLowAddr, &dayLow);
144     ret = HiRtcSpiRead(rtcInfo, regAddr->dayHighAddr, &dayHigh);
157 static uint32_t HiRtcReadPreviousConfig(struct RtcConfigInfo *rtcInfo)
162     ret = HiRtcSpiRead(rtcInfo, RTC_INT_RAW, &value);
172     ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
178         ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (~(RTC_LOCK_BYPASS_MASK)) & value);
184     ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
189     ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (value | RTC_LOCK_MASK));
203     struct RtcConfigInfo *rtcInfo = NULL;
210     rtcInfo = (struct RtcConfigInfo *)host->data;
211     ret = HiRtcReadPreviousConfig(rtcInfo);
218         ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
233     return HiRtcReadTimeData(rtcInfo, &regAddr, time);
236 static int32_t HiRtcWriteTimeData(struct RtcConfigInfo *rtcInfo, struct RtcTimeReg *regAddr, const struct RtcTime *time)
252     ret = HiRtcSpiWrite(rtcInfo, regAddr->millisecondAddr, millisecond);
256     ret = HiRtcSpiWrite(rtcInfo, regAddr->secondAddr, time->second);
260     ret = HiRtcSpiWrite(rtcInfo, regAddr->minuteAddr, time->minute);
264     ret = HiRtcSpiWrite(rtcInfo, regAddr->hourAddr, time->hour);
268     ret = HiRtcSpiWrite(rtcInfo, regAddr->dayLowAddr, (day & 0xFF)); /* 0xFF:mask */
272     ret = HiRtcSpiWrite(rtcInfo, regAddr->dayHighAddr, (day >> SHIFT_BYTE)); /* 8:[15:8] for day high bit */
286     struct RtcConfigInfo *rtcInfo = NULL;
293     rtcInfo = (struct RtcConfigInfo *)host->data;
301     if (HiRtcWriteTimeData(rtcInfo, &regAddr, time) != HDF_SUCCESS) {
306     ret = HiRtcSpiWrite(rtcInfo, RTC_LORD, (value | RTC_LOAD_MASK));
313         ret = HiRtcSpiRead(rtcInfo, RTC_LORD, &value);
330     struct RtcConfigInfo *rtcInfo = NULL;
338     rtcInfo = (struct RtcConfigInfo *)host->data;
339     if (alarmIndex != rtcInfo->alarmIndex) {
351     return HiRtcReadTimeData(rtcInfo, &regAddr, time);
356     struct RtcConfigInfo *rtcInfo = NULL;
364     rtcInfo = (struct RtcConfigInfo *)host->data;
365     if (alarmIndex != rtcInfo->alarmIndex) {
377     return HiRtcWriteTimeData(rtcInfo, &regAddr, time);
382     struct RtcConfigInfo *rtcInfo = NULL;
389     rtcInfo = (struct RtcConfigInfo *)host->data;
390     if (alarmIndex != rtcInfo->alarmIndex) {
394     rtcInfo->cb = cb;
402     struct RtcConfigInfo *rtcInfo = NULL;
409     rtcInfo = (struct RtcConfigInfo *)host->data;
415     ret = HiRtcSpiRead(rtcInfo, RTC_MSC, &value);
421         ret = HiRtcSpiWrite(rtcInfo, RTC_MSC, (value | RTC_MSC_TIME_MASK));
423         ret = HiRtcSpiWrite(rtcInfo, RTC_MSC, (value & (~RTC_MSC_TIME_MASK)));
438     struct RtcConfigInfo *rtcInfo = NULL;
445     rtcInfo = (struct RtcConfigInfo *)host->data;
446     ret = HiRtcSpiRead(rtcInfo, RTC_FREQ_H, &highFreq);
447     ret |= HiRtcSpiRead(rtcInfo, RTC_FREQ_L, &lowFreq);
462     struct RtcConfigInfo *rtcInfo = NULL;
479     rtcInfo = (struct RtcConfigInfo *)host->data;
480     ret = HiRtcSpiWrite(rtcInfo, RTC_FREQ_H, highFreq);
481     ret |= HiRtcSpiWrite(rtcInfo, RTC_FREQ_L, lowFreq);
492     struct RtcConfigInfo *rtcInfo = NULL;
499     rtcInfo = (struct RtcConfigInfo *)host->data;
500     ret = HiRtcSpiWrite(rtcInfo, RTC_POR_N, 0);
506     ret = HiRtcSpiWrite(rtcInfo, RTC_CLK, RTC_CLK_OUT_SEL);
516     struct RtcConfigInfo *rtcInfo = NULL;
528     rtcInfo = (struct RtcConfigInfo *)host->data;
529     return HiRtcSpiRead(rtcInfo, g_usrRegAddr[usrDefIndex], value);
534     struct RtcConfigInfo *rtcInfo = NULL;
546     rtcInfo = (struct RtcConfigInfo *)host->data;
547     return HiRtcSpiWrite(rtcInfo, g_usrRegAddr[usrDefIndex], value);
564 static int32_t HiRtcAttachConfigData(struct RtcConfigInfo *rtcInfo, const struct DeviceResourceNode *node)
576     if (rtcInfo->supportAnaCtrl == RTC_FEATURE_SUPPORT) {
582         rtcInfo->anaCtrlAddr = (uint8_t)value;
585     if (rtcInfo->supportLock == RTC_FEATURE_SUPPORT) {
590         rtcInfo->lockAddr.lock0Addr = (uint8_t)value;
595         rtcInfo->lockAddr.lock1Addr = (uint8_t)value;
600         rtcInfo->lockAddr.lock2Addr = (uint8_t)value;
605         rtcInfo->lockAddr.lock3Addr = (uint8_t)value;
610 static int32_t HiRtcConfigData(struct RtcConfigInfo *rtcInfo, const struct DeviceResourceNode *node)
622     rtcInfo->supportAnaCtrl = drsOps->GetBool(node, "supportAnaCtrl");
623     rtcInfo->supportLock = drsOps->GetBool(node, "supportLock");
625     ret = drsOps->GetUint32(node, "rtcSpiBaseAddr", &rtcInfo->spiBaseAddr, 0);
636     rtcInfo->regAddrLength = (uint16_t)value;
643     rtcInfo->irq = (uint8_t)value;
644     ret = HiRtcAttachConfigData(rtcInfo, node);
650     rtcInfo->alarmIndex = RTC_ALARM_INDEX_A;
651     rtcInfo->remapBaseAddr = NULL;
659     struct RtcConfigInfo *rtcInfo = NULL;
662     rtcInfo = (struct RtcConfigInfo *)data;
663     if (rtcInfo == NULL) {
667     ret = HiSpiRead(rtcInfo, RTC_INT, &value);
672     ret = HiSpiWrite(rtcInfo, RTC_INT_CLR, RTC_INT_CLR_MASK);
676     if (rtcInfo->cb == NULL) {
681         return rtcInfo->cb(rtcInfo->alarmIndex);
685         HiSpiRead(rtcInfo, RTC_MSC, &value);
686         HiSpiWrite(rtcInfo, RTC_MSC, value & (~RTC_INT_UV_MASK)); /* close low voltage int */
691 static int32_t HiRtcSwInit(struct RtcConfigInfo *rtcInfo)
695     if (rtcInfo->spiBaseAddr == 0 || (rtcInfo->regAddrLength == 0)) {
700     if (OsalMutexInit(&rtcInfo->mutex) != HDF_SUCCESS) {
705     if (rtcInfo->remapBaseAddr == NULL) {
706         rtcInfo->remapBaseAddr = (volatile void *)OsalIoRemap((uintptr_t)rtcInfo->spiBaseAddr,
707             rtcInfo->regAddrLength);
710     ret = OsalRegisterIrq(rtcInfo->irq, 0, HiRtcIrqHandle, "rtc_alarm", (void*)rtcInfo);
712         HDF_LOGE("HiRtcSwInit: register irq(%hhu) fail!", rtcInfo->irq);
713         (void)OsalMutexDestroy(&rtcInfo->mutex);
714         OsalIoUnmap((void*)rtcInfo->remapBaseAddr);
715         rtcInfo->remapBaseAddr = NULL;
722 static void HiRtcSwExit(struct RtcConfigInfo *rtcInfo)
724     (void)OsalUnregisterIrq(rtcInfo->irq, (void *)rtcInfo);
725     (void)OsalMutexDestroy(&rtcInfo->mutex);
727     if (rtcInfo->remapBaseAddr != NULL) {
728         OsalIoUnmap((void*)rtcInfo->remapBaseAddr);
729         rtcInfo->remapBaseAddr = NULL;
733 static uint32_t HiRtcHwAttachInit(struct RtcConfigInfo *rtcInfo)
737     if (rtcInfo->supportAnaCtrl == RTC_FEATURE_SUPPORT) {
738         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->anaCtrlAddr, RTC_ANA_CTRL_ENABLE);
742     if (rtcInfo->supportLock == RTC_FEATURE_SUPPORT) {
743         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->lockAddr.lock3Addr, RTC_LOCK_ORDER2);
744         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->lockAddr.lock2Addr, RTC_LOCK_ORDER2);
745         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->lockAddr.lock1Addr, RTC_LOCK_ORDER1);
746         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->lockAddr.lock0Addr, RTC_LOCK_ORDER0);
747         ret |= HiRtcSpiWrite(rtcInfo, rtcInfo->anaCtrlAddr, RTC_ANA_CTRL_ORDER);
757 static int32_t HiRtcHwInit(struct RtcConfigInfo *rtcInfo)
763     OSAL_WRITEL(RTC_CLK_DIV_VALUE, RTC_SPI_CLK_DIV((uintptr_t)rtcInfo->remapBaseAddr));
764     ret |= HiRtcSpiWrite(rtcInfo, RTC_MSC, RTC_MSC_ENABLE);
765     ret |= HiRtcSpiWrite(rtcInfo, RTC_SAR_CTRL, RTC_UV_CTRL_ENABLE);
766     ret |= HiRtcHwAttachInit(rtcInfo);
767     ret |= HiRtcSpiWrite(rtcInfo, RTC_FREQ_H, FREQ_H_DEFAULT);
768     ret |= HiRtcSpiWrite(rtcInfo, RTC_FREQ_L, FREQ_L_DEFAULT);
774     if (HiRtcSpiRead(rtcInfo, RTC_INT_RAW, &value) != 0) {
804     struct RtcConfigInfo *rtcInfo = NULL;
810     rtcInfo = OsalMemCalloc(sizeof(*rtcInfo));
811     if (rtcInfo == NULL) {
816     if (HiRtcConfigData(rtcInfo, device->property) != 0) {
818         OsalMemFree(rtcInfo);
822     if (HiRtcSwInit(rtcInfo) != 0) {
824         OsalMemFree(rtcInfo);
828     if (HiRtcHwInit(rtcInfo) != 0) {
830         HiRtcSwExit(rtcInfo);
831         OsalMemFree(rtcInfo);
836     host->data = rtcInfo;
844     struct RtcConfigInfo *rtcInfo = NULL;
852     rtcInfo = (struct RtcConfigInfo *)host->data;
853     if (rtcInfo != NULL) {
854         HiRtcSwExit(rtcInfo);
855         OsalMemFree(rtcInfo);