Lines Matching defs:reserved
129 * 110: 150MKz(Supported only in eMMC mode); others: reserved.
148 * 0x00: 0; 0x01: 11.25; 0x02: 22.5; ... 0x1E: 337.5; 0x1F: 348.75; others: reserved.
157 * 0x00: 0; 0x01: 11.25; 0x02: 22.5; ... 0x1E: 337.5; 0x1F: 348.75; others: reserved.
289 * [15:9]reserved.
308 * [15:14]reserved.
331 * [31:28]reserved.
333 * [26:25]reserved.
342 * [3]reserved.
359 * [5]reserved.
361 * 11: ADMA2 or ADMA3. When Host Version 4 Enable in HOST_CTRL2_R is 0: 00: SDMA; 01: reserved;
365 * [0]reserved.
387 * [15:4]reserved.
400 * [3:0]Data timeout count. 0x0: TMCLK x 2^13; 0xe: TMCLK x 2^27; others: reserved.
406 * [7:3]reserved.
417 * [15]Summary error interrupt status. [14]reserved. [13]TX event interrupt status.
458 * [9:8]reserved; [3]reserved.
469 * [2:0]emmc mode. 000: Legacy; 001: High Speed SDR; 010: HS200; others: reserved.
477 #define SDHCI_HS_SDR200 0x0005 /* reserved value in SDIO spec */
505 * [17:16]Maximum block length. 0x0: 512Byte; 0x1: 1024Byte; 0x2: 2048Byte; 0x3: reserved.
531 * 10: MODE3, Auto retuning Timer and ReTuning request; 11: reserved.
533 * [11:8]Retuning count. 0x1: 1s; 0x3: 4s; others: reserved.
590 * [15:10]reserved; [8:2]reserved.
657 uint32_t reserved : 28;