Lines Matching refs:val
171 unsigned int val;
173 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
174 val |= GLB_EN_MASK;
175 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
180 unsigned int val;
182 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
183 val &= ~GLB_EN_MASK;
184 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
189 unsigned int val;
191 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_EN);
192 val &= ~flag;
193 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_INTR_EN);
212 unsigned int val;
223 val = clkRate / (freq << 1);
224 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_H);
225 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_L);
227 val = (clkRate * HI35XX_SCL_HIGH_CNT) / (freq * HI35XX_SCL_FULL_CNT);
228 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_H);
229 val = (clkRate * HI35XX_SCL_LOW_CNT) / (freq * HI35XX_SCL_FULL_CNT);
230 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_SCL_L);
232 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_GLB);
233 val &= ~GLB_SDA_HOLD_MASK;
234 val |= ((0xa << GLB_SDA_HOLD_SHIFT) & GLB_SDA_HOLD_MASK);
235 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_GLB);
328 unsigned int val;
330 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_CTRL1);
331 val |= CTRL1_CMD_START_MASK;
332 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL1);
338 unsigned int val;
345 val = (0x1 << GPIO_MODE_SHIFT) | (0x1 << FORCE_SCL_OEN_SHIFT) | (0x1 << FORCE_SDA_OEN_SHIFT);
346 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
351 val = (0x1 << GPIO_MODE_SHIFT) | 0x1;
352 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
356 val = (0x1 << GPIO_MODE_SHIFT) | (0x1 << FORCE_SCL_OEN_SHIFT) | (0x1 << FORCE_SDA_OEN_SHIFT);
357 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
368 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_CTRL2);
369 } while (!(val & (0x1 << CHECK_SDA_IN_SHIFT)));
371 val = (0x1 << GPIO_MODE_SHIFT) | (0x1 << FORCE_SCL_OEN_SHIFT) | (0x1 << FORCE_SDA_OEN_SHIFT);
372 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
374 val = (0x1 << GPIO_MODE_SHIFT) | (0x1 << FORCE_SCL_OEN_SHIFT);
375 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
379 val = (0x1 << GPIO_MODE_SHIFT) | (0x1 << FORCE_SCL_OEN_SHIFT) | (0x1 << FORCE_SDA_OEN_SHIFT);
380 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
383 val = (0x1 << FORCE_SCL_OEN_SHIFT) | 0x1;
384 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_I2C_CTRL2);
391 unsigned int val;
394 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT);
395 if (val & STAT_RXF_NOE_MASK) {
403 __func__, OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW), val);
411 unsigned int val;
414 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT);
415 if (val & STAT_TXF_NOF_MASK) {
423 __func__, OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW), val);
431 unsigned int val;
434 val = OSAL_READL(hi35xx->regBase + HI35XX_I2C_INTR_RAW);
435 if (val & (INTR_ABORT_MASK)) {
436 HDF_LOGE("%s: wait idle abort!, RIS: 0x%x", __func__, val);
439 if (val & INTR_CMD_DONE_MASK) {
447 __func__, val, OSAL_READL(hi35xx->regBase + HI35XX_I2C_STAT));
478 uint8_t val;
496 val = (uint8_t)OSAL_READL(hi35xx->regBase + HI35XX_I2C_RXF);
497 status = HdfCopyToUser((void *)&msg->buf[bufIdx], (void *)(uintptr_t)&val, sizeof(val));
510 status = HdfCopyFromUser((void *)&val, (void *)(uintptr_t)&msg->buf[bufIdx], sizeof(val));
515 OSAL_WRITEL((unsigned int)val, hi35xx->regBase + HI35XX_I2C_TXF);